Simultaneous high-fidelity single-qubit gates in a spin qubit array - Nature

MainQuantum computing holds the potential to revolutionize fields from cryptography to materials discovery, but building scalable, fault-tolerant quantum processors remains a central challenge. Spin qubits in solid-state devices1,2 are a leading platform candidate, with a compact footprint and compatibility with industrial semiconductor fabrication3,4,5,6, offering a route towards scaling to the millions of qubits envisioned for fault-tolerant quantum computing architectures7.For fault-tolerant quantum computing, gate fidelities must exceed the threshold set by quantum error correction protocols, such as the surface code8. While the requirement depends on the noise model, fidelities above 99.9% are widely targeted for practical fault-tolerant operation9,10. In scalable quantum processors, control must extend beyond sequential single-qubit gates to the simultaneous operation of multiple qubits, because idle qubits dephase much faster than driven ones. In our silicon spin qubits, for example, driven coherence times are about \({T}_{2}^{R}\approx 100\,\mathrm{\mu s}\), while idle dephasing times are only \({T}_{2}^{* }\approx 10\,\mathrm{\mu s}\). This makes sequential operations impractical at scale because minimizing qubit idle times requires simultaneous control across many qubits. However, parallel qubit control typically degrades fidelities because of crosstalk. Such degradation has been observed not only in spin qubits11,12,13 but also in superconducting systems, where mitigation strategies have been developed14,15,16,17. In spin qubits, the problem is particularly severe: fidelities were recently reported to drop considerably from 99.95% to 99.5% under parallel operation of only two qubits in silicon/silicon-germanium devices, the same platform used in this work12. The physical origin of this degradation has remained unclear11,12,13. Addressing it is therefore essential for implementing large-scale error correction codes that require parallel gate execution.We identify microwave-drive-induced a.c.-Stark shifts as the dominant source of fidelity degradation during parallel operation and introduce a compact calibration protocol that compensates these shifts using only pairwise measurements. This approach avoids the exponential overhead of full crosstalk characterization and enables high-fidelity parallel control of five qubits through a shared qubit-control line. Tailored control pulses allow individual qubits to reach fidelities well above 99.99%, with some approaching 99.999%, as measured by randomized benchmarking (RB). Fidelities above 99.99% are also sustained during simultaneous operation of up to three qubits, while full five-qubit parallel operation maintains fidelities at the practical fault-tolerant threshold of 99.9% or higher. This performance exceeds previously reported fidelities in silicon spin qubits and establishes a benchmark for scalable, high-fidelity parallel control in semiconductor quantum processors. The use of a shared control line further reduces wiring complexity, supporting continued scaling towards larger qubit arrays in silicon.Five-qubit device and operationFigure 1a shows the false-coloured scanning electron micrograph of a cofabricated silicon five-qubit device identical to the one used in this experiment. The device is fabricated in an isotopically purified 28Si/SiGe quantum well. Three overlapping aluminium metal gate layers, separated by native oxide, are deposited on the wafer to define and control an array of five quantum dots that host spin qubits. Two adjacent charge sensor quantum dots at the ends of the array are used for qubit readout18. A cobalt micromagnet (not shown) is deposited on top of the device to induce a gradient field for qubit addressability and operation19,20. A microwave signal (MW) is applied to the MW gate electrode (dashed line) to manipulate the spin states of all five qubits in the array via electric dipole spin resonance (EDSR)21,22,23, thereby providing a shared control line for all qubits. Further details on the device are given in Methods.Fig. 1: Five-qubit device.Full size imagea, False-coloured scanning electron micrograph of a cofabricated device identical to the one used in this experiment (scale bar, 100 nm). An array of five quantum dots is accumulated beneath plunger gates P1-5, hosting the five spin qubits. Two sensor quantum dots (yellow) are accumulated on both ends of the array, allowing single-shot readout. Microwave signals are applied to the MW screening gate (outlined by the dashed line) to perform single-qubit operations via EDSR. A cobalt micromagnet is fabricated on top of the device (not shown) to enable qubit addressability and EDSR operations within a gradient field. b, Device operation scheme. The five qubits are initialized in the \(\left\vert \uparrow \downarrow \downarrow \uparrow \downarrow \right\rangle\) state, manipulated during the operation stage using control pulses, and then read out. c,d, Initialization (Init) and measurement of qubit pairs Q1,2 (c) and Q4,5 (d) using PSB readout and a feedback X2 gate conditioned on the PSB readout result. All PSB integration times are set to 10 μs. e, Initialization and measurement of qubit Q3 using QND readout and a conditional X2 gate. f, Qubit resonance frequencies at an external field of B = 0.42 T. The micromagnet gradient induces an approximate 150-MHz separation between all adjacent qubits, enabling individual qubit addressability with MW pulses. g, Qubit phase coherence time \({T}_{2}^{* }\) and Hahn echo sequence coherence time \({T}_{2}^{{\rm{Hahn}}}\) for all qubits. The total integration time is a few minutes for all measurements. h, The driving amplitude dependence of the qubit Rabi frequencies fR shows a linear relationship for all qubits up to fR ≈ 8 MHz, after which some qubits begin to exhibit nonlinear behaviour.Source dataFigure 1b shows the device operation scheme. We operate the device in the (3,1,1,3,1)-electron charge configuration for the five quantum dots. Pauli-spin blockade (PSB) is used to read out the parity of qubit pairs Q1,2 and Q4,5 by projecting qubit Q2 (Q5) onto qubit Q1 (Q4). The dots containing three electrons serve as the projection dots for the PSB readouts, which helps increase the readout windows18. We use feedback initialization18,24 to initialize the qubit states. The circuits for qubit pairs Q1,2 and Q4,5 are shown in Fig. 1c,d. The qubit parity is first read out using PSB. After the PSB measurement, the qubits are pulsed back to the (3,1) operation point. An X2 operation is applied to perform a π-flip on qubit Q1 or Q5 if an even parity state (\(\left\vert \downarrow \downarrow \right\rangle\) or \(\left\vert \uparrow \uparrow \right\rangle\)) is measured, thereby flipping the system into an odd parity state (\(\left\vert \uparrow \downarrow \right\rangle\) or \(\left\vert \downarrow \uparrow \right\rangle\)). No operation is applied if an odd parity state is measured. Another PSB readout is performed following this feedback operation to project the state into the S(4, 0) singlet state. The micromagnet gradient lifts the degeneracy between the spin states, allowing initialization of the S(4, 0) singlet state into the \(\left\vert \uparrow \downarrow \right\rangle\) state via an adiabatic ramp. We use the (3,1,1,3,1) charge configuration and the corresponding projections to maximize the readout window of both PSB readouts. Qubit Q3 is measured by quantum non-demolition (QND) measurement between Q2 and Q3 (ref. 25), as shown in Fig. 1e. A CROT gate is applied with qubit Q3 as the control qubit and Q2 as the target. A PSB readout of the Q1,2 pair is then performed, and if an even (odd) parity state is measured, we infer that qubit Q3 is in the \(\left\vert \uparrow \right\rangle\) (\(\left\vert \downarrow \right\rangle\)) state. Based on this readout, a conditional X2 gate is applied to qubit Q3, preparing it in the \(\left\vert \downarrow \right\rangle\) state. After the QND readout, the Q1,2 pair is re-initialized using the PSB feedback initialization circuit. The QND readout is repeated twice to increase the initialization fidelity of qubit Q3.The five-qubit state is initialized to \(\left\vert \uparrow \downarrow \downarrow \uparrow \downarrow \right\rangle\) before the operation stage, during which single- and two-qubit operations are applied to control the quantum processor. Afterward, the parity of qubit pairs Q1,2 and Q4,5, along with the state of Q3, is read out, yielding three bits of information per cycle. The resonance frequencies of the five qubits, shown in Fig. 1f, exhibit a Zeeman energy difference of ΔEZ ≈ 150 MHz between neighbouring qubits, consistent with our micromagnet design. Coherence properties are characterized by an average dephasing time \({T}_{2}^{* }\approx \text{10.3}\,\mathrm{\mu s}\) and an average Hahn echo decay time \({T}_{2}^{\mathrm{Hahn}}\approx 60\,\mathrm{\mu s}\), as shown in Fig. 1g. Low residual exchange is crucial for high-fidelity single-qubit gates in multiqubit systems26,27. Under single-qubit operating conditions, we measure the residual exchange below J 99.99% over a range of ≈0.4 MHz. The slight skew towards positive detuning is attributed to MW-induced heating (Extended Data Fig. 7 and Supplementary Section 2). Points show the mean of four repetitions; uncertainties are obtained from the fitting covariance matrix. d, Single-qubit RB at varying operation speeds using Kaiser-window pulses. The operation speed is defined as the Rabi frequency fR of a square pulse with the same area as the applied pulse. Simulations use noise extracted from independent measurements of qubits under idling conditions (Extended Data Fig. 4), which defines a lower bound set by the dephasing limit. At faster gate speeds, the deviation of the experimental data from the simulations results from MW-induced decoherence caused by the control pulses, not captured in the simulations. These effects become more pronounced at higher operation speeds, as faster gates require stronger MW drive. Data are averaged over 35 randomized sequences per Clifford length. Fidelity uncertainties are obtained from the fitting covariance matrix.Source dataThe Clifford gate set is composed solely of X and Y gates, each corresponding to a π/2 pulse, such that the fitted primitive gate fidelity matches the fidelity of the single-qubit π/2 gate (Methods). To minimize qubit idling, where they are more susceptible to dephasing noise, we replace the identity gate I in the gate set with 4 × X or 0 × X (skipping the gate completely). Both replacements result in similar fidelities, enhancing the robustness of the gate sequences against dephasing11. For the same reason, the idle time between primitive quantum gates is minimized to 2 ns, the hardware limit of our control equipment (Methods). The qubit frequency and the amplitude for the single-qubit gates are calibrated and fine-tuned before the experiment (Extended Data Fig. 2). Following these calibrations, we measure the RB decay for all five qubits, as shown in Fig. 2a. All qubits reach primitive single-qubit fidelities above 99.99%, with some approaching 99.999%. Interleaved RB28 confirms that the X and Y gates perform similarly, both achieving fidelities well above 99.99% (Extended Data Fig. 3).Next, we test the robustness of our high-fidelity control against frequency detuning by measuring the RB fidelity of qubit Q3 as a function of MW–frequency offset, as shown in Fig. 2c. We find that fidelities remain above 99.99% across a detuning window of ≈0.4 MHz. Notably, this window is larger than the typical qubit frequency fluctuations in our devices (≈0.1 MHz; Extended Data Fig. 4), which are primarily caused by charge noise20,29,30.Gate fidelity depends on a trade-off between dephasing at low speeds and reduced driven coherence at high speeds. We evaluate this behaviour by performing single-qubit RB experiments at varying operation speeds (Fig. 2d). The resulting infidelity increases both for slow gates, owing to charge-noise-induced dephasing31, and for fast gates, owing to additional MW-induced decoherence20,32,33,34. This trade-off is reflected in the qubit operation quality factors, which exhibit a maximum at the optimal driving speed (Extended Data Fig. 5). For qubits Q1 to Q4, the optimal gate time results in a fidelity close to 99.999%, while Q5 reaches an optimal fidelity of ≈99.995%, consistent with its lower maximum spin-lock quality factor. We attribute the variations between qubits to differences in the confinement potential, probably arising from local fabrication, tuning conditions and material variability common in academic devices such as the one used here23,35. The proximity of qubits Q1 and Q5 to the charge sensors acting as reservoirs may also render them more susceptible to drive-induced decoherence, resulting in lower spin-lock quality factors.To quantitatively assess these trends, we compare the experimental fidelities to numerical simulations based on dephasing noise measured under idling conditions (Extended Data Fig. 4). As expected, the simulations accurately reproduce the infidelity trends at slower gate speeds (500 ns to 250 ns), consistent with the expected infidelity scaling \(1-F\propto {t}_{{\rm{g}}}^{2}\) for dephasing under quasi-static noise (see Methods for details). However, at faster gate speeds, the experimental fidelities are lower than predicted. This indicates that MW-induced noise from qubit operations, absent during idling and thus not included in the model, emerges at faster speeds and contributes to decoherence. The associated infidelity can be reproduced by modelling a moderate increase in the qubit noise level caused by the applied MW signals (Extended Data Fig. 4).Simultaneous operation of two qubitsAs a first demonstration of high-fidelity parallel control, we investigate simultaneous operation of two qubits. We benchmark the fidelity of this parallel control using a simultaneous RB (SRB) experiment on qubits Q3 and Q4 (ref. 14). In this experiment, independent randomized Clifford sequences are applied simultaneously to both qubits, and the resulting decays are fitted to extract individual gate fidelities under simultaneous operation (Methods). Simultaneous quantum gates are implemented by combining the single-qubit MW pulses for each qubit using a MW combiner, enabling operation of multiple qubits with a shared control line (see also Methods). Because of the a.c.-Stark effect, MW control pulses addressed to one qubit also expose neighbouring qubits on the shared control line to off-resonant fields, shifting their resonance frequencies and inducing z-phase errors (Extended Data Fig. 6). These crosstalk phase shifts are quadratic in the off-resonant drive amplitude, with the sign opposite for each qubit in the pair, as is characteristic of the a.c.-Stark effect. Simultaneous operations also modify the optimal MW amplitudes required for π/2 rotations, indicating residual driven-gate errors beyond the crosstalk phase shifts. To achieve high-fidelity simultaneous operations, both the residual rotation errors and z-phase errors must be calibrated and compensated.To calibrate the crosstalk phase errors, we apply a Hahn-echo sequence to the target qubit while performing 4N X gates on another qubit (Fig. 3a,b) and measure the resulting phase accumulation per gate (Fig. 3c,d). The crosstalk phase accumulated on qubit Qi when operating qubit Qj is denoted as Δϕij. For Q3 and Q4, the measured crosstalk phases are Δϕ34 = 0.0379(2) rad and Δϕ43 = −0.0026(1) rad. The discrepancy in phase shift magnitudes arises from the different power required to drive each qubit at the same operation speed (Extended Data Fig. 5): Q3 requires less power than Q4, resulting in a smaller off-resonant drive and, consequently, a smaller a.c.-Stark shift experienced by Q4. These phases are compensated during the simultaneous pulse sequence by offsetting the MW phases during the experiment, as illustrated in Fig. 3e. While we apply a fixed phase compensation per pulse, this corrects the dominant crosstalk-induced phase shifts during simultaneous operation. Time-dependent phase modulation within the pulse envelope would enable direct compensation of amplitude-dependent phase shifts during the gate. Slower phase drifts, for example, due to microwave-induced heating (Extended Data Fig. 7), lead to additional phase accumulation on longer timescales36, suggesting that dynamical phase compensation could further improve gate fidelity.Fig. 3: Crosstalk phase in simultaneous two-qubit operation.Full size imagea,b, Sequence for measuring the crosstalk phase errors accumulated (a) on qubit Q3 by Q4 control pulse and (b) on qubit Q4 by Q3 control pulse. c,d, Measured crosstalk phase errors accumulated on qubit Q3 when operating qubit Q4 (c) and on qubit Q4 when operating qubit Q3 (d). Each point is a phase extracted from a cosine fit; error bars are obtained from the fitting covariance matrix. e, Compensation of crosstalk phase error during simultaneous operations. For each pulse, the MW phase in the following gates on qubit Q3 (Q4) is shifted by Δϕ34 (Δϕ43). \({\phi }_{3,0}^{(n)}\) and \({\phi }_{4,0}^{(n)}\) correspond to the uncompensated phase values, which are equal to 0 (π/2) if an X (Y) gate is applied. f, Calibration of the operation amplitudes A3 and A4 for simultaneous operations on Q3 and Q4. The simultaneous X gate is implemented by combining the individual qubit driving signals and applying them to the MW gate. A Nelder–Mead optimizer from SciPy46 is used to minimize the probability difference and extract optimal amplitudes. The 2D map shows the probability difference between the two sequences, with the white trace indicating the optimization trajectory. Only a sparse subset of points (white circles) is sampled during optimization. g, SRB decays of qubit Q3 and Q4 without and with the phase and amplitude calibration. With calibration, Q3 shows a substantial fidelity increase, while Q4 remains mostly unaffected, due to a larger crosstalk phase error in Q3. In this SRB scheme, the RB sequences differ for the two qubits. Data are averaged over 35 randomized sequences per Clifford length. Error bars show 95% confidence intervals; fidelity uncertainties are obtained from the fitting covariance matrix.Source dataAfter measuring the crosstalk phase errors, we calibrate the operation pulse amplitudes, adjusting A3 and A4 for the two-qubit simultaneous operation (Fig. 3f). We apply 16 simultaneous X gates to the qubit pairs, followed by 1 (3) simultaneous X gate(s), which flip the qubits into \(\left\vert +x,+x\right\rangle\) (\(\left\vert -x,-x\right\rangle\)) state to maximize sensitivity to over- or under-rotation errors. Because the probabilities P+X and P−X for the two sequences are equal at an optimal MW amplitude, we use an optimizer to minimize the summed probability difference \({\sum }_{{Q}_{3},{Q}_{4}}| {P}_{+X}-{P}_{-X}|\) of both qubits to obtain the optimal pulse amplitudes. Figure 3f shows a two-dimensional (2D) map of the probability difference, along with an illustration of the optimization process.To demonstrate the effect of our calibration scheme, we perform a two-qubit SRB experiment on qubits Q3 and Q4, both with and without applying the calibrations for the simultaneous operations (Fig. 3g). In the uncalibrated case, the individual single-qubit gate pulses are summed and applied to qubit Q3 and Q4 directly. Without calibration, Q4 still achieves a gate fidelity above 99.99%, while Q3 remains limited to 99.9% due to a sizable uncorrected phase accumulation Δϕ34. After applying the calibrations, both qubits reach fidelities exceeding 99.99%.Simultaneous operation of multiple qubitsWe now extend our parallel-control experiments to multiple qubits in the array. The crosstalk phases are calibrated for multiqubit operations by measuring the phases accumulated on each qubit individually and summing these contributions linearly. To validate this approach, we measure the crosstalk phases accumulated on Q3 when operating Q2 or Q4 individually (see Fig. 4a,b for the quantum circuit) and compare them with simultaneous pulses on both qubits (Fig. 4c). The measured phases as a function of control pulse amplitude are shown in Fig. 4d. Summing the fitted individual-phase results (dashed black line) agrees well with simultaneous pulse measurements, demonstrating that crosstalk phases can be measured pairwise and summed linearly. This method enables precise, scalable compensation of phase crosstalk in multiqubit control sequences.Fig. 4: Generalized calibration of parallel multiqubit operations.Full size imagea–c, Sequence for measuring crosstalk phase error accumulated on qubit Q3 while operating (a) qubit Q2, (b) qubit Q4 and (c) both Q2 and Q4 simultaneously. d, Amplitude dependence of the crosstalk phases. We fit the phase accumulations with \({\mathrm{AV}}_{\mathrm{amp}}^{\alpha }\) and repeat the experiment for other qubit pairs. We find an average α = 1.91(5), in good agreement with the a.c.-Stark shift (Extended Data Fig. 6). The dashed black line shows the sum of the two fits in the individual operation cases. e, Crosstalk phase measured for all qubit pairs in a qubit Q2,3,4 three-qubit simultaneous drive. In d and e, each point is a phase extracted from a cosine fit; error bars are obtained from the fitting covariance matrix. f, Illustration of the protocol to compensate for the crosstalk phase error for the multiqubit simultaneous operations. \({\phi }_{i,0}^{(n)}\) represents the uncompensated phase for qubit Qi. g, Amplitude calibration for a three-qubit simultaneous operation using the SciPy minimizer. h, Three-qubit SRB decays showing >99.99% primitive gate fidelity. Data are averaged over 35 randomized sequences per Clifford length. Error bars show 95% confidence intervals; fidelity uncertainties are obtained from the fitting covariance matrix.Source dataFigure 4e,f illustrates the calibration procedure for general multiqubit simultaneous operations, demonstrated here for the three-qubit case with qubits Q2, Q3 and Q4. The simultaneous π/2 gate duration is set to 250 ns to reduce the peak driving amplitude. Crosstalk phases Δϕij between each qubit pair are measured individually and compensated within the gate sequences by shifting the MW phase on each qubit Qi by ∑j≠iΔϕij, as illustrated in Fig. 4f. The simultaneous operation amplitudes are then calibrated using the same method described for the two-qubit case. Figure 4g illustrates the three-qubit optimization process, showing the driving amplitudes A2, A3 and A4, and the resulting probability difference at each step. After approximately ten steps, the amplitudes converge, minimizing the probability difference. Using these calibrated phases and amplitudes, we perform a three-qubit SRB experiment and achieve primitive π/2 gate fidelities >99.99% for all three qubits (Fig. 4h).Finally, we explore the limits of parallel control with our shared control line approach by operating all five qubits simultaneously and discuss the implications for larger arrays. To achieve this, we calibrate all crosstalk phases and control pulse amplitudes using the pairwise-calibration procedure described above. We also compare this pairwise-calibration approach with a full calibration, in which the phase accumulation on each qubit is measured while the other four are operated, and observe no difference in performance. This underscores that the pairwise approach enables scalable and resource-efficient parallel control across multiple qubits. Due to readout limitations (only three bits of information per cycle), we perform tomographic readout18 on the qubit pairs Q1,2 and Q4,5 to reconstruct the individual qubit states (Fig. 5a; Methods). The complete five-qubit SRB sequence is illustrated in Fig. 5b, where each random Clifford sequence is repeated twice to perform the two required tomographic measurements (ZZ and ZI) needed to reconstruct the full five-qubit state.Fig. 5: Five-qubit simultaneous operation.Full size imagea, Tomographic readout protocol used to obtain the individual spin states from the PSB pairs Q1,2 and Q4,5. b, Five-qubit SRB sequence with tomographic readout. The sequence is repeated with ZZ and ZI measurements on PSB pairs Q1,2 and Q4,5 to reconstruct all individual qubit states. c, Primitive gate infidelity of single-qubit operation and five-qubit simultaneous operation with X gate times of 250 ns and 500 ns. Four of five qubits exceed fidelities of 99.9%, with Q5 reaching approximately 99.9%. Points are fitted infidelities from 35 randomized sequences per Clifford length; uncertainties are obtained from the fitting covariance matrix.Source dataWe perform SRB experiments with gate durations of tg = 250 ns and 500 ns (Fig. 5c). In both cases, overall fidelities remain similar but lower than in the three-qubit parallel operation, with four out of five qubits achieving fidelities above 99.9%. This behaviour reflects opposing error mechanisms: at tg = 250 ns, the higher total MW power required for simultaneous operation increases decoherence, probably due to heating or MW-induced noise, thereby reducing performance relative to single-qubit gates. At tg = 500 ns, the lower drive amplitudes mitigate these effects. Still, the longer gate duration introduces increased dephasing from low-frequency noise, yielding fidelities comparable to single-qubit operation (see also Extended Data Table 1). The similar fidelities observed at tg = 250 ns and 500 ns indicate that high-fidelity simultaneous control with ≈99.9% fidelities could be extended to ten qubits at tg = 500 ns, where the total MW power matches that of five-qubit operation at tg = 250 ns.Off-resonant microwave tones can induce qubit-frequency shifts, which appear as idle-qubit phase shifts as shown in Fig. 4d. During simultaneous driven gates, however, the same frequency shifts can also detune the applied pulses, causing residual rotation errors that are not fully described by the idle-qubit phase measurements alone37. These residual driven-gate errors are minimized empirically by the simultaneous-drive amplitude calibration. In the five-qubit simultaneous-drive experiment, applying a simultaneous-drive amplitude calibration did not lead to a notable change in the observed fidelities, probably because lower driving amplitudes are used for these operations. In future implementations, direct compensation of the frequency shifts may provide a more systematic calibration strategy.ConclusionsWe demonstrate high-fidelity (>99.99%) single-qubit control across all five qubits in a silicon spin qubit array using tailored Kaiser-window control pulses and maintain these fidelities during simultaneous operation of up to three qubits through a shared control line. Extending to simultaneous control of all five qubits, we achieve fidelities at the practical fault-tolerant threshold of 99.9% and suggest that, based on the observed power scaling, this control approach is expected to extend to approximately ten qubits within the current device architecture. In practical quantum circuits, overall fidelity depends on the performance of all operations, including two-qubit gates, state preparation and measurement and idling. High single-qubit fidelity therefore remains beneficial for circuit performance. Together, these results demonstrate that high-fidelity parallel control across multiple silicon spin qubits is achievable, addressing a central challenge in scaling spin-based quantum processors.This level of parallel control is enabled by a scalable calibration protocol that compensates for MW-induced, qubit-specific phase shifts from off-resonant a.c.-Stark shifts. For simultaneous control of N qubits, instead of calibrating all the 2N − N − 1 simultaneous driving combinations, only N(N − 1) pairwise calibrations are required, avoiding the exponential overhead of full crosstalk characterization. In general, the magnitude of these phase shifts scales inversely with detuning, such that corrections become negligible for sufficiently detuned qubit pairs (Extended Data Fig. 6), further reducing the calibration overhead in larger arrays. This scaling behaviour is compatible with architectures in which qubits are organized into subunits of order ten, each operated via a shared control line and driven by a common microwave source. These results thus provide guidance for scalable control architectures enabling parallel operation across multiple subunits and indicate a viable route towards scaling qubit control in larger arrays.In a quantum processor, two-qubit operations are also required. The a.c.-Stark shift calibration method presented here applies when qubits are effectively uncoupled during microwave control, such that the resulting phase shifts correspond to additive single-qubit Z rotations. When exchange is activated during microwave driving, however, the phase evolution is no longer restricted to simple single-qubit phase shifts and additional conditional phases can arise38. Resonantly driven two-qubit gates30 therefore involve microwave control while the qubits are coupled and are expected to exhibit additional microwave-induced conditional phases arising from a.c.-Stark effects, which would require calibration. By contrast, exchange-controlled CZ gates implemented with baseband pulses avoid this complication because they do not rely on microwave driving during the interaction39.While fidelities remain high, simultaneous five-qubit operation is currently limited by MW-induced decoherence at fast gate speeds and by dephasing at longer gate durations. Modest improvements to the micromagnet design can double the driving-field gradient (Extended Data Fig. 8 and Supplementary Section 1), enabling faster gates at reduced power. This would mitigate MW-induced decoherence and extend the dephasing-limited regime to higher speeds, allowing fidelities above 99.999% at modest gate speeds of 2–3 MHz (Fig. 2d), and supporting high-fidelity parallel control of larger qubit numbers.To further enhance control performance and scalability, the micromagnet can be replaced by nanomagnets integrated into the gate layer or back-end-of-line wiring. Placing magnetic structures closer to the qubits provides stronger local field gradients40,41 and preserves gradient strength in multilayer routing architectures required for 2D or quasi-2D spin qubit arrays42,43. Without such integration, the increased vertical separation between qubits and magnetic structures above the routing layers will otherwise degrade control performance44,45, limiting the scalability of parallel qubit control.Our shared control approach directly addresses a key scaling bottleneck in silicon spin qubits, enabling parallel and high-fidelity operation. Driving multiple qubits from a single impedance-matched control line reduces wiring overhead and simplifies on-chip control infrastructure. Combined with compact pairwise calibration and targeted device improvements, this offers a practical control strategy for scalable silicon qubit unit cells. Crucially, the shared-control-line architecture can be extended beyond local units to support the parallel control of multiple subarrays, with total MW drive power and calibratable a.c.-Stark shifts as the primary constraints. Together, these advances define a realistic path towards scalable, parallel qubit control in silicon, which is a core requirement for the development of large-scale quantum processors.MethodsDevice fabricationThe quantum dots were defined in a 9-nm-thick isotopically enriched silicon quantum well with a residual Si-29 concentration of 800 ppm. The quantum well is covered by a 30-nm SiGe buffer layer and approximately 2 nm of silicon oxide. A 15-nm Al2O3 layer was then deposited on the wafer using atomic layer deposition. Three layers of overlapping aluminium gates were fabricated through electron-beam lithography and lift-off processes. The aluminium was oxidized, and the resulting native aluminium oxide serves as an insulator between the gate layers. A micromagnet was fabricated on top of the device to provide magnetic field gradients for qubit addressability and operations. The micromagnet consists of a stack of 5-nm titanium and 250-nm cobalt films and is positioned on top of the overlapping gates, separated by a 30-nm atomic layer deposition aluminium oxide layer. The micromagnet design is similar to those used in our previous devices30,33,47 with a gap size of 400 nm. See also Extended Data Fig. 8 and Supplementary Section 1 for more details.Qubit controlTo control the qubit energies, quantum dot confinements and tunnel couplings, we apply d.c. voltages using D5a digital-to-analogue converters from Qblox and use baseband pulses generated by Keysight M3201A arbitrary waveform generators to pulse the qubits between operation and readout points. Qubit control pulses are generated by Keysight M3202A arbitrary waveform generators and mixed with local oscillators from a multichannel signal generator (APMS20G4) using IQ mixers. The single-qubit operations of the five qubits are facilitated through three IQ mixers (2xMMIQ-0626HS and 1xMLIQ02181). The IQ mixers have been carefully calibrated to minimize leakage of local oscillator and image signals. The resulting signals are combined in a power splitter (ZC8PD-5R263-S+), amplified (ZVA-183G-S+) and bandpass-filtered. An MW switch (P9402C) suppresses MW leakage outside the operation stage. The MW signal is then routed through a low-loss superconducting NbTi coaxial line inside the dilution refrigerator, entering a designated impedance-controlled MW line on the sample PCB. From there, the signal is transmitted via bond wires to the quantum chip, reaching the designated MW gate (Fig. 1a).The qubit displacement under EDSR driving can be estimated from the simulated micromagnet gradient of 1.25 mT nm−1. Converting the Rabi frequency fR = 3 MHz to a driving field via B1 = hfR/(gμB) with g ≈ 2 yields B1 ≈ 0.107 mT, corresponding to a displacement Δx ≈ 0.09 nm.To perform the CROT and CZ two-qubit gates required for initializing, operating and reading out the quantum processor, the exchange interaction between neighbouring qubits is increased from the residual exchange J {v}_{{\rm{thres}}})\& ({s}_{ZI} > {v}_{{\rm{thres}}}),$$ (2) $${P}_{\downarrow \uparrow }=({s}_{ZZ} {v}_{{\rm{thres}}}),$$ (4) $${P}_{\downarrow \downarrow }=({s}_{ZZ} > {v}_{{\rm{thres}}})\& ({s}_{ZI} < {v}_{{\rm{thres}}}).$$ (5) We then calculate the single-qubit state probability by$${P}_{1,\uparrow }={P}_{\uparrow \downarrow }+{P}_{\uparrow \uparrow },$$ (6) $${P}_{2,\uparrow }={P}_{\downarrow \uparrow }+{P}_{\uparrow \uparrow }.$$ (7) Similarly, we obtain the probabilities P4,↑ and P5,↑. The sequence fidelity, which is fitted in the five-qubit SRB experiments, is calculated by \({F}_{{\rm{seq}},i}=| {P}_{i,\uparrow }^{{\rm{flip}}}-{P}_{i,\uparrow }^{{\rm{noflip}}}|\).RB simulations incorporating measured qubit noiseTo model the impact of noise on the RB fidelities, we first extract a noise power spectral density (PSD) model from Ramsey and Carr–Purcell–Meiboom–Gill measurements performed under idling conditions, during which the quantum processor was not actively operated (Extended Data Fig. 4a). Based on this PSD, we generate noise contributions across three characteristic timescales determined by the experimental conditions: low-frequency (LF) noise (Extended Data Fig. 4b), intermediate-frequency (IF) noise and high-frequency (HF) noise.RB sequences are constructed using the same gate set as in the experiments. Each primitive gate is simulated as a unitary time evolution \(\exp (-i{\hat{H}}_{{\rm{op}}}(t){t}_{g})\), where \({\hat{H}}_{{\rm{op}}}(t)\) includes both the ideal drive and a σz detuning51 induced by noise:$${\hat{H}}_{\mathrm{op}}(t)=2{\rm\pi }\left(\frac{\beta (t)}{2}{\sigma }_{z}+\frac{{f}_{{\rm{R}}}}{2}(\cos (\phi )\,{\sigma }_{x}+\sin (\phi )\,{\sigma }_{y})\right),$$with β(t) = βLF + βIF + βHF(t).Here, β(t) describes the detuning noise in hertz. The noise is incorporated into the simulation as follows: the LF noise component βLF is held constant over each RB sequence and updated between sequences, while the IF component βIF is updated after each primitive gate. To realistically capture correlations across timescales, LF and IF noise are generated jointly rather than independently. HF noise βHF(t) is modelled as a fluctuating detuning during gate execution, updated every 10-ns or 50-ns time step. Because HF noise has no measurable impact on the simulated fidelities at the experimentally relevant levels, it is neglected in the simulations.After simulating the complete qubit evolution for an RB sequence under noise, we calculate the return probabilities Fnoflip and Fflip and extract RB fidelities using the same procedure as for the experimental data.The observed dependence of gate fidelity on gate duration can be understood analytically by considering the effect of slow detuning noise in the quasi-static regime. In this limit, the frequency detuning β remains effectively constant during a gate of duration tg, leading to a relative phase accumulation Δϕ = 2πβtg between the computational basis states52. For small Δϕ, and assuming a symmetric distribution of detunings centred at zero, the π/2-gate infidelity becomes \(1-F=1-| \langle {\psi }_{{\rm{ideal}}}| \psi \rangle {| }^{2}\propto \langle {(\Delta \phi )}^{2}\rangle \propto \langle {\beta }^{2}\rangle {t}_{g}^{2}\), linking gate error directly to the noise variance 〈β2〉 and the square of the gate duration53. This quadratic dependence on tg is observed both in simulation and in experimental data where dephasing dominates (tg = 250 and 500 ns) (Fig. 2d).