Quantum loop adds just 0.5µs with AMD/Qblox link

AMD and Qblox are connecting quantum control directly to classical accelerators, a move designed to speed up quantum error correction. The companies report a latency of just 1.8µs added by the AMD/Qblox link itself, a remarkably small delay considering the need to maintain qubit coherence. Round trip times measured across five AMD processors ranged from 1.8 to 3.7 µs, demonstrating the speed and consistency of data transfer. “Speed or freedom is a false choice,” a Qblox representative stated, emphasizing the commitment to vendor-neutrality reflected in the open-source Q1ASM instruction set within their software stack. AMD/Qblox Link Adds Minimal Latency to Quantum Loop The AMD/Qblox integration achieves a remarkably low latency of 1.8µs added by the link itself, a figure critical for maintaining qubit coherence during complex quantum operations and accelerating the development of quantum error correction protocols. This minimal delay is achieved by bypassing host software, directing measurement data directly to the memory of AMD Instinct GPUs, EPYC CPUs and Versal adaptive SoCs via a PCIe connection. Source: qblox.com The team demonstrated that even when the host process was intentionally frozen mid-run, the GPU continued to respond without failure, highlighting the robustness of the direct link, Qblox says. The architecture’s flexibility extends to the choice of accelerator, with the same link card image functioning across GPUs, CPUs and adaptive SoCs without modification. Decoders consistently returned bit-identical results on each of these AMD processors, confirming the portability and reliability of the system. Beyond hardware compatibility, the collaboration emphasizes open-source software and vendor neutrality. This commitment to openness allows developers to write code in Python, C, or OpenMP, integrating it smoothly with the hardware through a library-based runtime rather than a restrictive framework. The design prioritizes deterministic, nanosecond-scale processing at the quantum hardware interface, using field-programmable gate arrays (FPGAs) at both the Qblox control modules and the AMD Alveo link card. Unlike CPUs or GPUs, FPGAs execute control and readout logic with predictable latency, essential for real-time feedback loops that must complete within a qubit’s coherence window. This integration facilitates real-time quantum error correction, a process that measures qubit states, decodes error syndromes, and applies corrections within that limited timeframe. The full technical details of the runtime design and measurements are available in a companion deep dive document, offering a comprehensive overview of the system’s capabilities.

Direct Memory Access Speeds Quantum-Classical Communication Direct memory access streamlines the exchange of data between quantum hardware and classical processing units. This reduction in delay stems from a new link between Qblox control systems and AMD accelerators, bypassing traditional host software bottlenecks and allowing measurement data to land directly in accelerator memory. The architecture uses established high-performance computing techniques, adapting proven interconnects for quantum applications rather than reinventing them. The AMD and Qblox collaboration uses two proprietary backplane protocols, SYNQ and LINQ, to ensure deterministic synchronization and low-latency feedback. Source: qblox.com SYNQ achieves picosecond-level jitter, while LINQ maximizes data throughput, creating a reliable channel for real-time communication. This direct path, facilitated by Aurora 64B/66B serial links and PCIe, allows an AMD Alveo V80 Compute Accelerator to write requests directly into accelerator memory and receive replies without host software intervention.

Open Runtime Supports Diverse Classical Accelerators This minimized latency is not simply an incremental improvement; it fundamentally alters the pacing of the quantum feedback loop, shifting the bottleneck from qubit stability to the speed of classical processing. The design deliberately avoids inserting host software into the data pathway, recognizing that unpredictable delays within the host process erode the window for error correction. The system’s versatility extends beyond speed, supporting a range of classical accelerators with a single hardware interface. Source: qblox.com This hardware agnosticism is underpinned by an open runtime library, allowing developers to write decoding algorithms in Python, C, or OpenMP and deploy them to the most suitable accelerator without code modification. As stated by the companies, the runtime’s architecture is deliberately lightweight, functioning as a library rather than a rigid framework. This allows functions to move smoothly between an AMD GPU and CPU simply by specifying the target device, a level of flexibility that contrasts with more restrictive approaches. The companies envision scaling this architecture beyond paired devices, with plans for a mesh network of multiple control endpoints, accelerators and programmable logic to handle increasingly complex quantum systems. The current implementation has already demonstrated high reliability, successfully processing 10,000 frames of measurement data without loss. Both AMD and Qblox emphasize that openness is a feature and a fundamental requirement. Bit-Identical Results Across GPUs, CPUs, and SoCs The ability to achieve bit-identical results across diverse classical computing architectures, GPUs, CPUs and SoCs, represents an advancement in quantum control systems. AMD and Qblox demonstrated this consistency by running the same decoding algorithms on AMD Instinct GPUs, AMD EPYC CPUs and AMD Versal adaptive SoCs without modification to the underlying logic or interface, according to the company. This uniformity stems from a deliberate architectural choice: the runtime operates as a library, allowing code written in Python, C, or OpenMP to execute on the most appropriate processor without requiring code alterations. Source: qblox.com This hardware agnosticism extends to the instruction level, with Qblox making its Q1ASM instruction set open source. The companies report that small error-correction decoders for the Steane-7 and repetition-3 codes returned logical errors equal to a reference decoder, while simultaneously delivering bit-identical replies from each processor type. This level of consistency is not merely a convenience. It allows developers to select optimal processors for specific tasks within the quantum workflow, maximizing performance and efficiency. The same link card image serves all three processor types without changes, simplifying integration and reducing development overhead. “Change the programming model, keep both ends,” the companies state, highlighting the modularity of the system. The implications of this approach extend beyond performance gains. By decoupling the control stack from the underlying processor architecture, AMD and Qblox have created a more open and adaptable platform for quantum computing research and development. The ability to run the same decoder on different hardware configurations facilitates easier comparison and validation of results, accelerating the pace of innovation. Beyond Decoding: Enabling Adaptive Quantum Control This consistency is critical for real-time quantum control, where even minor variations in latency can disrupt qubit coherence and introduce errors in calculations. Beyond simply accelerating decoding, the architecture facilitates a broader range of adaptive quantum control techniques, including real-time calibration and the implementation of hybrid algorithms. Calibration, the process of tracking and correcting drift in qubit parameters, can now be performed dynamically during experiments, improving the stability and accuracy of quantum computations. Adaptive circuits, which adjust subsequent operations based on mid-circuit measurement results, become more viable with the reduced latency, allowing for more complex and responsive quantum programs. The Qblox control stack’s ability to bypass the host computer and deliver measurement data directly to AMD accelerators is a key innovation, eliminating a significant source of unpredictable latency, the firm reports.

The Qblox Cluster supports superconducting qubits, spin qubits, quantum dots and NV centers, operating from DC to 18.5 GHz, offering a unified control solution for diverse qubit platforms. Source: https://qblox.com/newsroom/amd-qblox-open-gpu-integration More like thisQuantum HardwareInduced photon loss reveals hidden noise affecting superconducting qubitsQuantum HardwarePhotonic circuits now perform any quantum measurement, researchers showHigh Performance ComputingRIKEN, IBM and Cleveland Clinic run quantum chemistry on 12,635-atom systemQuantum HardwareFPGA chips require reliable entropy sources for security.Stay currentSee today’s quantum computing news on Quantum Zeitgeist for the latest breakthroughs in qubits, hardware, algorithms, and industry deals. Tags: