Pêlagos achieves near-linear GPU scaling.

Researchers from Advanced Micro Devices and IBM Research report near-linear scaling in quantum error correction simulations using up to eight AMD Instinct MI300X and MI355X GPUs.

The team achieved optimized speedups of 5.68× and 6.23×, respectively, when decoding a one-gross [[144,12,12]] code, and even greater gains with a two-gross code, reaching 7.58× and 7.45× throughput. This work demonstrates a practical path to accelerating large-scale QEC simulation, deploying the Pêlagos decoder on Lux, Oak Ridge National Laboratory’s AMD Instinct MI355X-based supercomputer, as a “pathfinding application” for high-throughput simulation. Pêlagos Scales Relay-BP Decoding with Multi-GPU Orchestration The Pêlagos relay belief-propagation decoder now achieves throughput scaling of 7.58× on AMD Instinct MI300X GPUs and 7.45× on MI355X GPUs when decoding a two-gross [[288,12,18]] code, demonstrating near-linear performance gains as GPU count increases. This advancement stems from a redesigned orchestration system that isolates processing for each GPU, enabling concurrent preparation of data shards and using shared memory for efficient output delivery. The approach addresses limitations inherent in naively distributing decoding tasks, which often introduces host-side bottlenecks that hinder scalability.

Advanced Micro Devices and IBM Research collaborated on the work, focusing on optimizing performance within a multi-GPU environment.

The team’s design assigns a dedicated process and a private HIP context to each GPU, a departure from previous implementations that relied on a single process managing multiple decoders. This isolation, coupled with concurrent host-side preparation of data, minimizes overhead and maximizes GPU use. The use of shared memory for returning correction arrays further streamlines the process, reducing data transfer times and improving overall throughput. Evaluation involved both one-gross [[144,12,12]] and two-gross [[288,12,18]] codes, with parameters consistent with previously published Pêlagos configurations and a fixed relay depth of R = 50. The implementation is publicly available, allowing for independent verification and further development within the quantum computing community. The one-gross detector error model used in the evaluation contains 1,872 checks, 71,280 error mechanisms and 419,904 nonzero check-matrix entries across 13 detector layers. The two-gross detector error model is significantly larger, comprising 5,472 checks, 213,408 error mechanisms, and 1,257,984 nonzero entries across 19 detector layers. These larger circuits demand substantial computational resources, making efficient multi-GPU scaling important for practical evaluation and parameter exploration. This deployment highlights the potential for using existing high-performance computing infrastructure to accelerate progress in quantum error correction. The researchers emphasize that the implementation retains single-GPU kernels and layouts, focusing optimization efforts on the surrounding node-local preprocessing, process ownership and output collection. “By demonstrating scalable syndrome processing, we provide a concrete use case for extending AI + HPC infrastructure to quantum-computing research, aligned with the Genesis Mission’s goal of accelerating scientific discovery,” the authors state in their published work.

The team’s work provides a foundation for further exploration of scalable decoding algorithms and their implementation on advanced hardware platforms. The evaluation harness used in the study overrides only the execution settings necessary for scaling, including throughput mode selection, logical GPU list specification and batch size adjustment. This targeted approach minimizes disruption to the core decoding algorithm, allowing for a clear assessment of the performance gains achieved through the multi-GPU orchestration. The source code is available at commit 0127224 in the public Pêlagos repository, facilitating reproducibility and encouraging community contributions. The researchers note that iteration counts and logical error rates were measured as single-GPU medians at R = 50, with ranges spanning both the MI300X and MI355X platforms.

Syndrome Shard Processing Optimizations in Pêlagos Process-isolated orchestration, parallel host preprocessing and shared-memory output extend the Pêlagos relay belief-propagation decoder, enabling substantial gains in quantum error correction simulation throughput. The design addresses limitations inherent in naively distributing syndrome batches across multiple graphics processing units, which can introduce host-side overheads that restrict scaling performance. Specifically, the team targeted improvements in how Pêlagos manages contiguous ranges of the syndrome batch, termed “shards”, decoded independently by each GPU. The original Pêlagos implementation dispatched work through host threads within a single Python process, creating potential bottlenecks related to Heterogeneous-compute Interface for Portability (HIP) context coordination. This new approach uses one isolated process per GPU, concurrently preparing shards on the host and employing shared memory for returning correction arrays, streamlining data flow and reducing overhead. Evaluation on both AMD Instinct MI300X and MI355X GPUs demonstrated significant scaling improvements for both one-gross [[144,12,12]] and two-gross [[288,12,18]] circuits. AMD Instinct MI300X GPUs and eight AMD Instinct MI355X GPUs achieve optimized end-to-end speedups of 5.68× and 6.23×, respectively. Further gains were observed with the more complex two-gross circuit, with the MI300X GPUs delivering speedups of 6.92× and the MI355X GPUs achieving 7.01×. Importantly, throughput calculations based solely on GPU decoding time revealed near-linear GPU scaling, reaching 7.58× on MI300X and 7.45× on MI355X. This indicates that adding GPUs effectively increases the number of syndromes processed concurrently without significantly enlarging the workload per GPU. Microarchitecture analysis revealed that larger batches increase GPU occupancy but reduce cache reuse, highlighting the need for careful optimization of batch sizes. The deployment positions Pêlagos as a “pathfinding application” for high-throughput quantum error correction simulation. The resulting algorithm achieves low error rates without requiring a second-stage decoder such as ordered statistics decoding, and the team observed no logical failures in measured runs at R = 50 after correcting the memory-strength interval for the two-gross circuit.

The team’s design improves scaling as GPU count increases, benefiting from the independence of syndrome shards, allowing each GPU to execute the decoder on its own shard without exchanging intermediate messages. The researchers acknowledge that further optimization of batch sizes and consideration of GPU memory-bandwidth limitations are important areas for future work. But the current results represent a step towards enabling practical, large-scale quantum error correction simulations. Near-Linear GPU Scaling Achieved with Two-Gross Circuits For two-gross circuits, throughput calculations using GPU decoding time reached 7.58× on AMD Instinct MI300X GPUs and 7.45× on MI355X GPUs, indicating near-linear GPU scaling as GPU count increased, a critical advancement for accelerating quantum error correction simulation. “We present a process-isolated orchestration design for accelerating large-scale QEC simulation with the Pêlagos Relay-BP decoder within an eight-GPU node,” the researchers state in their report. These end-to-end measurements demonstrate a practical path to accelerating large-scale QEC simulation through efficient multi-GPU decoding. Pêlagos Deployment on Lux at Oak Ridge National Laboratory Pêlagos, a quantum error-correction decoder, was deployed on Lux, the AMD Instinct MI355X-based supercomputer, serving as a testbed for high-throughput quantum error correction simulation. The work focuses on optimizing host orchestration, managing data flow to and from the GPUs, rather than cluster-scale deployment, a distinction from prior studies. Through a process-isolated design, the team achieved end-to-end throughput gains of 7.58× on MI300X and 7.45× on MI355X GPUs when decoding the two-gross circuit, using GPU decoding time as the metric. This scaling indicates that the overhead typically associated with distributing syndrome batches across multiple GPUs has been effectively minimized, allowing for near-linear performance improvements as GPU count increases. The hardware configuration used AMD ROCm software atop PyTorch, ensuring consistency across both MI300X and MI355X GPU platforms, with the Pêlagos source revision and Python package versions held constant. Jobs recorded host processor details, core counts and memory capacity to provide a detailed record of the testing environment. The two-gross circuit required an average of 1.6 relay legs per syndrome during decoding, a parameter consistent with the broader decoder-quality evaluation detailed in the original Pêlagos publication. This work builds directly on previous implementations of Relay-BP, such as those introduced by Diamantopoulos et al., but shifts the focus to process-isolated host orchestration, rather than large-cluster deployment.

The team acknowledges related work in autotuning systems like OpenTuner and the tensor virtual machine (TVM) compiler, which also employ measured objectives to search implementation spaces. Relay Belief-Propagation and Memory Strength Intervals The performance of quantum error correction relies heavily on the precise calibration of parameters within decoding algorithms. Specifically, the team found that adjusting the memory-strength interval to [-0.161, 0.815] eliminated logical failures in two-gross codes at a rate of R=50. This optimization, important for maintaining code integrity, was achieved through extensive simulations using the Pêlagos decoder and multi-GPU systems. Further analysis revealed a relationship between circuit complexity and computational demands. This parameter highlights the increasing computational burden associated with larger, more complex quantum codes.

The team’s work addresses this challenge by optimizing the distribution of decoding tasks across multiple GPUs, minimizing overhead and maximizing throughput. This deployment is a validation of the infrastructure required to support advanced quantum computing research. The use of Lux, a leading supercomputing facility, emphasises the importance of high-performance computing resources in accelerating the development of quantum error correction. This approach provides a concrete quantum-computing use case for the AI + HPC infrastructure supporting it.

The team’s approach to parallelizing Pêlagos across multi-GPU platforms achieved optimized end-to-end speedups of 5.68× and 6.23× for the one-gross circuit, and speedups of 6.92× and 7.01× for the two-gross circuit. The study meticulously documented the algorithmic parameters used in their simulations, including pre-relay BP iterations, iterations per relay set and the initial memory strength. 👉 More information🗞 Scaling Pêlagos: Multi-GPU Orchestration for Relay Belief-Propagation Decoding✍️ Xulong Tang et al.🧠 ArXiv: https://arxiv.org/html/2611.16285v1 More like thisQuantum Computing NewsA [[30,6,5]] code may allow quantum experiments to scale up fasterHigh Performance ComputingPower grid problem tests Quantum Inspire’s link to DelftBlueQuantum Error CorrectionA shifted operating point prevents controller stall in quantum error correctionHigh Performance ComputingRIKEN, IBM and Cleveland Clinic run quantum chemistry on 12,635-atom systemStay currentSee today’s quantum computing news on Quantum Zeitgeist for the latest breakthroughs in qubits, hardware, algorithms, and industry deals. Tags: