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La Luce Cristallina Launches Quantum Paraelectric Strontium Titanate on Insulator Wafer Platform

Mohamed Abdel-Kareem
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⚡ Quantum Brief
Advanced semiconductor materials manufacturer La Luce Cristallina has launched its 0.5-micrometer (μm) silicon-based quantum paraelectric strontium titanate on insulator (QP-STOI) wafer platform. Engineered to support quantum computing, cryogenic electronics, and non-linear electro-optic architectures, the platform provides device developers and national research laboratories with a foundry-compatible substrate designed to exploit the extreme dielectric tunability of strontium titanate (SrTiO3 / STO) at liquid-helium temperatures. The platform launch directly aligns with ongoing federal infrastructure initiatives, including the Department of Commerce’s $2 billion CHIPS Act quantum allocation and NIST’s newly established Quantum Manufacturing Engineering Center.
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Quantum News · Media Library

La Luce Cristallina Launches Quantum Paraelectric Strontium Titanate on Insulator Wafer Platform La Luce Cristallina’s silicon-based quantum paraelectric strontium titanate on insulator (QP-STOI) wafer platform. Advanced semiconductor materials manufacturer La Luce Cristallina has launched its 0.5-micrometer (μm) silicon-based quantum paraelectric strontium titanate on insulator (QP-STOI) wafer platform. Engineered to support quantum computing, cryogenic electronics, and non-linear electro-optic architectures, the platform provides device developers and national research laboratories with a foundry-compatible substrate designed to exploit the extreme dielectric tunability of strontium titanate (SrTiO3 / STO) at liquid-helium temperatures. Built upon a thick silicon dioxide (SiO2) insulating foundation, the platform features a bulk-like, highly insulating STO layer that is 100 times thicker than conventional epitaxial STO buffer layers deposited directly on silicon. At cryogenic operating temperatures, STO transitions into a quantum paraelectric state where its dielectric properties become exceptionally responsive to applied electric fields without undergoing ferroelectric domain freezing. This voltage-tunable behavior enables precise phase and frequency control, offering a material platform for building low-noise parametric amplifiers for QPU readout, tunable microwave resonators, electro-optic modulators, and precision electromechanical cryogenic sensors. The QP-STOI substrate is engineered for full CMOS and commercial semiconductor foundry compatibility, allowing quantum hardware developers to integrate STO-based components into existing 300mm and 200mm fabrication lines. Currently available in a 2-inch format for early-stage device prototyping, La Luce Cristallina plans to scale production to 200 mm (8-inch) commercial wafers. The platform launch directly aligns with ongoing federal infrastructure initiatives, including the Department of Commerce’s $2 billion CHIPS Act quantum allocation and NIST’s newly established Quantum Manufacturing Engineering Center. Review the official news release on PR Newswire here, read our coverage of the U.S. Department of Commerce CHIPS Act Quantum Allocations here, and examine our analysis of the NIST Quantum Manufacturing Engineering Center Launch here. September 9, 2026 Mohamed Abdel-Kareem2026-09-09T17:59:32-07:00 Leave A Comment Cancel replyComment Type in the text displayed above Δ This site uses Akismet to reduce spam. Learn how your comment data is processed.

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Source: Quantum Computing Report

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