Quantum Materials & Devices: Hardware Components & Fabrication
Quantum materials news: quantum device fabrication, superconductors, quantum dots, 2D materials. Quantum hardware components & substrates.
Quantum materials and devices form the foundational hardware layer enabling all quantum technologies, requiring specialized materials with precise quantum properties including superconductors, topological insulators, 2D materials like graphene, and semiconductor heterostructures for qubit fabrication.
India's Quantum Materials and Devices Initiatives
India's National Quantum Mission includes Quantum Materials & Devices as the fourth thematic vertical with dedicated funding. The QMD Tech Foundation at IIT Delhi serves as the Thematic Hub on Quantum Materials and Devices, established under the T-Hub framework of NQM. The hub focuses on developing indigenous materials for quantum technologies including substrates for superconducting circuits, quantum dots for spin qubits, and specialized semiconductors.
The ₹720 crore investment for quantum fabrication facilities announced in November 2025 supports this vertical, with facilities at: IISc Bengaluru: Quantum computing fabrication for superconducting, photonic, and spin qubits (3-5 qubits per chip initially, scaling to 20-100 qubits); IIT Bombay: Quantum sensing and device fabrication; IIT Delhi: Quantum materials and packaging; IIT Kanpur: Smaller facility for specialized devices.
The Indian Institute of Technology Madras Centre for Quantum Information, Communication and Computing (CQuICC) houses India's first remotely accessible semiconductor qubit facility, capable of fabricating 3-5 qubit chips per run with 95% device yield.
Research Areas: Superconducting materials: Niobium and aluminum thin films for Josephson junctions; Semiconductor quantum dots: Silicon and III-V materials for spin qubits; 2D materials: Graphene, transition metal dichalcogenides for novel qubit designs; Topological materials: Research into materials exhibiting Majorana zero modes; Photonic materials: Silicon photonics, nonlinear optical crystals for quantum light sources.
The Defence Research and Development Organisation (DRDO) develops quantum materials for defense applications including secure communications and sensing. The Department of Atomic Energy (RRCAT, Indore) provides specialized laser and materials processing capabilities for quantum device fabrication. The NQM targets developing superconductors, novel semiconductor structures, and quantum materials for memory and device fabrication as key deliverables within the 8-year mission timeline.
quantum-computingRwth Aachen University Team Proposes Hybrid Color Code Architecture for Fault-Tolerant Computation
Researchers have created a new quantum computer architecture by combining two established methods of protecting quantum information, known as error correction. Quantum error correction is vital because qubits, the fundamental units of quantum information, are exceptionally susceptible to noise and decoherence, leading to computational errors; these codes provide a means of mitigating such errors. This hybrid system uses tetrahedral and H-tetrahedral codes; these codes allow for more operations to be performed without introducing errors than previously possible. Scientists at RWTH Aachen University and Technische Universität Munich have detailed a new approach to building more reliable quantum computers by combining two existing methods of protecting quantum information. The tetrahedral code, a three-dimensional quantum error correcting code, is known for its relatively high threshold for error rates, meaning it can tolerate a significant amount of noise before failing. The H-tetrahedral code is derived from the tetrahedral code via a Hadamard transform, altering its properties and enabling complementary operations. This hybrid architecture utilises tetrahedral and H-tetrahedral codes, allowing for more complex calculations with fewer errors than previously achievable. A key obstacle to creating a complete set of instructions for a quantum computer has been the Eastin-Knill theorem, which acts as a roadblock preventing fully universal operations using only error-resistant methods; think of it like trying to build a road with missing sections. The theorem essentially states that within a single quantum error-correcting code, it is impossible to implement a universal set of transversal gates. Transversal logical gates, where each physical component directly contributes to the result, simplify error correction and are central to this new design. This is because errors during a transversal gate operation are confined to a limited number of physical qubits, simplifying de
Quantum ZeitgeistLoading...0
quantum-computingPurdue Finds Unique 2D Phonon Source of Qubit Decoherence
Researchers at Purdue University have pinpointed an origin for spin relaxation in hexagonal boron nitride, identifying the out-of-plane flexural phonon branch, unique to two-dimensional materials, as the primary source of spin relaxation in boron vacancy centers. This finding extends existing theory to a previously unaddressed regime, offering a new microscopic interpretation of observed behavior in two-dimensional quantum defect centers. The Purdue team reports quantitatively reproducing the experimental magnetic field and temperature dependence of T1 (spin-lattice relaxation time) using a microscopic theory applying acoustic mode spin-phonon relaxation, achieving this accuracy without any empirical fitting parameters. These results reveal that relaxation dynamics are driven by a direct one-phonon emission and absorption process resonant with the Zeeman splitting, occurring in the sub-THz regime. A microscopic mechanism governs qubit coherence in hexagonal boron nitride, with sound waves playing the dominant role. The researchers report these findings in their recent work, and this level of predictive accuracy underscores the robustness of their microscopic model. This mechanism, resonant with the Zeeman splitting, builds upon existing treatments focused on low-field regimes. “We show that spin relaxation in the experimentally relevant field and temperature regime is dominated by the ZA phonon branch,” the researchers state. The study’s findings offer vital insights for developing high-field quantum sensing platforms utilizing layered materials, potentially unlocking enhanced performance in nanoscale magnetometry and other applications. The pursuit of robust quantum sensors has increasingly focused on point defects in two-dimensional materials, with the boron vacancy center in hexagonal boron nitride (hBN) emerging as a leading candidate. Realizing the full potential of these sensors requires a detailed understanding of the factors influencing performance, specific
Quantum ZeitgeistLoading...0
quantum-computingRISC-V Vector Engine Addresses 128 Qubits With One Instruction
Researchers are forecasting significant advances in quantum control for 2026, centered around a new approach leveraging the RISC-V Vector (RVV) engine. The team reports demonstrating the ability to address 128 qubits with a single instruction, a critical step toward scaling quantum systems beyond current limitations. This vectorized quantum control design also incorporates a hardware-based halt-resume protocol capable of restarting pipeline execution in 80 nanoseconds after a mid-circuit measurement, essential for the rapidly developing field of hybrid quantum-classical algorithms. Comprehensive evaluation using RISC-V toolchains and FPGA prototypes showed a 2.52 times speedup in program execution time compared to baseline designs, suggesting a pathway to overcome the classical control bottleneck hindering quantum processor expansion. Within each circuit family, speedup grows with the number of qubits; for example, performance increased from Bell-4 to Bell-8 by a factor of 52. This progression indicates that larger, more complex quantum algorithms will increasingly benefit from hardware designed to efficiently manage and process a greater number of qubits, moving beyond the limitations of earlier, smaller-scale systems. This capability represents a substantial leap in addressing scalability for quantum systems, moving beyond the sequential control methods that previously limited performance. The ability to operate on a larger qubit space in parallel is critical for realizing the full potential of quantum algorithms, particularly those designed to tackle complex optimization and simulation problems. The hardware-based halt-resume protocol, achieving a restart time of 80 nanoseconds after a mid-circuit measurement, is crucial for enabling rapid iteration in hybrid quantum-classical programs. This speed is essential for minimizing latency and maximizing the efficiency of algorithms that require frequent communication between the quantum processor and classical control
Quantum ZeitgeistLoading...0
quantum-computingDiraq Demonstrates Scaled Foundry-Fabricated Silicon-Based Qubit Array Made at imec
Insider Brief PRESS RELEASE — Diraq today announced the publication of “Eight-Qubit Operation of a 300 mm SiMOS Foundry-Fabricated Device” in Nature Communications, marking another decisive step on the company’s roadmap toward utility-scale quantum computers based on silicon. The paper shows that quantum bits (qubits) designed and fabricated by imec using the same industry-standard process […]
Quantum DailyLoading...0
quantum-computingDiraq’s Silicon Qubits Hit 99% Fidelity at 8-Qubit Scale
Diraq reports achieving 99% fidelity while scaling its silicon qubits to an eight-qubit array, a result published in Nature Communications that indicates a viable path toward practical quantum computing. The company fabricated the qubit array using imec’s 300 mm CMOS foundry process, the same technology used for conventional semiconductors, demonstrating that existing manufacturing infrastructure can support quantum chip production. This scaling from two to eight qubits, achieved in under a year, maintains key performance metrics such as coherence and control quality, thereby addressing a major hurdle in quantum computer development. “This is what an industrial pathway to quantum computing looks like,” said Andrew Dzurak, Founder and CEO of Diraq, adding that the company targets scaling to thousands of qubits by 2029 and more than one million qubits by 2031. Innovation Highlights: CMOS-native manufacturing processes, which have been refined over decades by the semiconductor industry, can be used to produce quantum chips that scale reliably. Larger arrays of silicon spin qubits maintain good performance along key metrics (coherence, control quality, architectural scalability for readouts) that was first demonstrated in smaller, two-qubit arrays. This level of performance and manufacturability will scale as array sizes increase, enabling silicon spin qubits to make a commercially useful quantum computer. imec 300mm CMOS Fabrication of Silicon Qubits Diraq’s recent advancements rely on a manufacturing process familiar to the semiconductor industry: imec’s 300mm complementary metal-oxide-semiconductor (CMOS) platform was used to fabricate an eight-qubit array, demonstrating a path toward mass production of quantum processors. Published in Nature Communications, the results reveal that silicon qubits can be scaled using established CMOS techniques without sacrificing performance, a critical challenge for practical quantum computing. This builds on a 2025 demons
Quantum ZeitgeistLoading...0
quantum-computingThe Other Direction: How AI Could Become The Operating System For Quantum Computing
WisdomTree5.92K FollowersFollow5ShareSavePlay(18min)CommentsSummaryAI is likely to accelerate quantum computing well before quantum accelerates AI, making today's AI infrastructure providers a compelling way to gain exposure to the theme.NVIDIA's Ising, CUDA-Q and NVQLink suggest the race for quantum leadership will be driven as much by AI infrastructure as by qubit breakthroughs.Rather than betting on hardware winners, investors can gain diversified exposure through the WisdomTree Artificial Intelligence and Innovation Fund and WisdomTree Quantum Computing Fund as AI and quantum technologies increasingly converge. mustafaU/iStock via Getty Images By Christopher Gannatti, CFA and Samuel Rines When NVIDIA (NVDA) announced Ising, a family of AI models designed specifically for quantum calibration and error decoding,1 it was easy to file the newsThis article was written byWisdomTree5.92K FollowersFollowIn 2006, WisdomTree launched with a big idea and an impressive mission — to create a better way to invest. We believed investors shouldn’t have to choose between cost efficiency and performance potential, so we developed the first family of ETFs designed to deliver both. Today, WisdomTree offers a leading product range that offers access to an unparalleled selection of unique and smart exposures.
Seeking AlphaLoading...0
quantum-computingPhD proposal in energetic cost of fault-tolerant quantum computing
PhD proposal in energetic cost of fault-tolerant quantum computing Application deadline: Sunday, July 26, 2026Employer web page: https://recrutement.inria.fr/public/classic/en/offres/2026-10236Job type: PhDTags: #PhD #quantum computing #energy #fault-tolerance #quantum error-correction #power #energetics #noise #correlated-noise #scalability #theory #PhDThe MOCQUA team at the Loria laboratory in Nancy (France) is looking for a PhD student in quantum computing theory. More details about the offer and platform to apply is provided in the link The goal will be to analyze how the energy consumption of fault-tolerant quantum computers scales as a function of the size of quantum algorithms, in a regime where the computation is specifically optimized to minimize energy consumption rather than qubits or gates counts. The main objective will be to determine whether better energy scaling than that predicted by the quantum threshold theorems [1,2] can be achieved, following the approaches developed in [3,4]. In practice, the PhD student will mostly focus on fault-tolerant quantum computing theory, and interact with other researchers providing the hardware energetic and noise models. Because such models can introduce correlated noise, this project will indirectly help understanding how to better design fault-tolerant circuits to resist such noise. To design more resource-efficient and noise-resilient fault-tolerant circuits, the PhD might use tools from diagrammatic reasoning for quantum circuits currently developed in the group [5], as well as recent developments in fault-tolerant circuit transformations [6]. =============================================== This project will be supervised by Marco Fellous-Asiani (Starting faculty at INRIA Université de Lorraine; expert in energetics of fault-tolerant quantum computing [3,4]), Simon Perdrix (Research director at INRIA Université de Lorraine; expert in diagrammatic reasoning for quantum circuits [5]), and invo
QuantikiLoading...0
quantum-computingLocalized control of large ion crystals in a Penning trap using a spatial light modulator
--> Quantum Physics arXiv:2607.06654 (quant-ph) [Submitted on 7 Jul 2026] Title:Localized control of large ion crystals in a Penning trap using a spatial light modulator Authors:Allison L. Carter, Jennifer F. Lilieholm, Bryce B. Bullock, Kurt Thompson, Diep Nguyen, John J. Bollinger View a PDF of the paper titled Localized control of large ion crystals in a Penning trap using a spatial light modulator, by Allison L. Carter and 5 other authors View PDF HTML (experimental) Abstract:Penning ion traps as quantum platforms have primarily utilized global control and symmetric Dicke states for quantum simulation and sensing experiments. The introduction of local control greatly increases the power of the platform as a quantum simulator but is technically challenging due to the rapid rotation of the ion crystals. Here we use an ultraviolet-compatible spatial light modulator (SLM) to imprint programmable AC Stark shift patterns with different azimuthal symmetries and gradients that co-rotate with the ion crystals, demonstrating localized coherent control of single plane crystals with greater than 100 ions. Comparisons of the measured ion qubit populations with calculations from independent measurements of the applied AC Stark shift patterns show good agreement, validating the technique and providing a path, with a higher format SLM, for parallelizable, coherent individual ion addressing in Penning traps. Comments: Subjects: Quantum Physics (quant-ph); Atomic Physics (physics.atom-ph) Cite as: arXiv:2607.06654 [quant-ph] (or arXiv:2607.06654v1 [quant-ph] for this version) https://doi.org/10.48550/arXiv.2607.06654 Focus to learn more arXiv-issued DOI via DataCite (pending registration) Submission history From: Allison Carter [view email] [v1] Tue, 7 Jul 2026 17:43:03 UTC (5,481 KB) Full-text links: Access Paper: View a PDF of the paper titled Localized control of large ion crystals in a Penning trap using a spatial light modulator, by Allison L. Carter and 5 othe
arXiv Quantum PhysicsLoading...0
quantum-computingLocalized Thermometry via Dayem Bridges Integrated on Superconducting Qubit Chips
--> Quantum Physics arXiv:2607.06670 (quant-ph) [Submitted on 7 Jul 2026] Title:Localized Thermometry via Dayem Bridges Integrated on Superconducting Qubit Chips Authors:Ella O. Lachman, Dave P. Pappas, Jayss Marshall, Josh Y. Mutus View a PDF of the paper titled Localized Thermometry via Dayem Bridges Integrated on Superconducting Qubit Chips, by Ella O. Lachman and 3 other authors View PDF HTML (experimental) Abstract:Accurate knowledge of the on-chip temperature is essential for understanding and optimizing the performance of superconducting qubits, yet direct thermometry at millikelvin temperatures remains challenging. While qubits themselves are sensitive to the temperature of their environment, other factors may affect the qubits` effective temperature, and using them as thermometers with any accuracy requires specialized measurement protocols and qubit designs, limiting their practicality for routine diagnostics and adding complex infrastructure to any hardware testing apparatus. Here we demonstrate a complementary on-chip thermometry method based on superconducting Dayem bridges that are integrated on the same chip as transmon qubits. By extracting the critical current of the Dayem bridge from I-V measurements, we obtain a local, quantitative measure of the chip temperature without the need for microwave calibration or qubit-specific control sequences. To demonstrate the utility of the Dayem bridges as thermometers, we fabricate them in-situ with qubits on the same chip, calibrate the Dayem bridge critical current as a function of temperature, and characterize its resolution and stability at cryogenic temperatures. We additionally perform simultaneous measurements of the Dayem bridge thermometer and qubit excited-state population, and show agreement over the relevant temperature range, validating the method against established qubit thermometry. Furthermore, we correlate the independently measured chip temperature with qubit energy relaxation and dephasing t
arXiv Quantum PhysicsLoading...0
quantum-computingSpin singlets are useful
--> Quantum Physics arXiv:2607.06672 (quant-ph) [Submitted on 7 Jul 2026] Title:Spin singlets are useful Authors:Silas Hoffman, Edward H. Chen, Matthew Brooks, Stephen Carr, Daniel Volya, Alan Tran, Tyler Keating, Thaddeus D. Ladd, Charles Tahan View a PDF of the paper titled Spin singlets are useful, by Silas Hoffman and 8 other authors View PDF HTML (experimental) Abstract:We evaluate the utility of the spin-zero manifold of an exchange-coupled array of $N$ spins for tasks in quantum computation and quantum simulation. Since pairs of electrons can be readily initialized into a product state of singlets in semiconducting quantum dot arrays, the full spin-zero manifold is available with exchange-only control, providing a Hilbert space of approximate dimension $2^N/(N/2)^{3/2}$, asymptotically close to the $2^N$ dimension of the full spin Hilbert space. Leveraging the spin-zero manifold enables larger computational space in a given array compared to traditional exchange-only control, in which spin arrays are organized into modular units of $n$ spins comprising $N/n$ encoded qubits, limiting to the exponentially smaller Hilbert dimension $2^{N/n}$. Here we focus on benchmarking metrics for this resource utilization by generalizing cross-entropy benchmarking, mirror benchmarking, and out-of-time-ordered correlators to this system. We show that operating in the spin-zero manifold can accelerate the realization of computational quantum advantage applications in semiconductor-based spin qubits. Comments: Subjects: Quantum Physics (quant-ph); Mesoscale and Nanoscale Physics (cond-mat.mes-hall) Cite as: arXiv:2607.06672 [quant-ph] (or arXiv:2607.06672v1 [quant-ph] for this version) https://doi.org/10.48550/arXiv.2607.06672 Focus to learn more arXiv-issued DOI via DataCite (pending registration) Submission history From: Silas Hoffman [view email] [v1] Tue, 7 Jul 2026 18:00:04 UTC (206 KB) Full-text links: Access Paper: View a PDF of the paper titled Spin single
arXiv Quantum PhysicsLoading...0
quantum-computingSpectral Born machines: classically trainable quantum generative models for discrete data
--> Quantum Physics arXiv:2607.06675 (quant-ph) [Submitted on 7 Jul 2026] Title:Spectral Born machines: classically trainable quantum generative models for discrete data Authors:Austin Huang, William Maxwell, Vasilis Belis, Evan Peters, Jason Pye, Soran Jahangiri, Joseph Bowles View a PDF of the paper titled Spectral Born machines: classically trainable quantum generative models for discrete data, by Austin Huang and 6 other authors View PDF HTML (experimental) Abstract:We present \emph{spectral Born machines}, a class of quantum generative models that results from viewing and generalizing the class of IQP Born machines through the lens of group Fourier analysis. These quantum models exploit the quantum Fourier transform to create an inductive bias that make them naturally suited to learning integer-structured data, while remaining classically hard to sample from in general. Similar to IQP Born machines, spectral Born machines can be trained efficiently at scale on classical hardware via a maximum mean discrepancy loss based on graph spectral analysis, which we make available in a new \emph{tcdq} module of the PennyLane software platform. In numerical experiments, we show how the spectral bias of the model leads to significantly reduced parameter counts compared to unstructured approaches, and demonstrate the scalability of the software by training a 190-qubit model with over 1 million parameters to successfully learn a distribution of 93 nucleotide-long ribosomal RNA. Our results suggest that highly over-parameterized spectral Born machines may be immune to overfitting, even in strongly data-scarce regimes. Subjects: Quantum Physics (quant-ph) Cite as: arXiv:2607.06675 [quant-ph] (or arXiv:2607.06675v1 [quant-ph] for this version) https://doi.org/10.48550/arXiv.2607.06675 Focus to learn more arXiv-issued DOI via DataCite (pending registration) Submission history From: Joseph Bowles [view email] [v1] Tue, 7 Jul 2026 18:00:17 UTC (1,839 KB) Full-text li
arXiv Quantum PhysicsLoading...0
Quantum error correction of a grid-state qubit with state preparation and measurement errors below $10^{-3}$
--> Quantum Physics arXiv:2607.06718 (quant-ph) [Submitted on 7 Jul 2026] Title:Quantum error correction of a grid-state qubit with state preparation and measurement errors below $10^{-3}$ Authors:Sara Turcotte (1,2), Lucas St-Jean (1), Amélie L. Pessonneaux (1), Ross Shillito (1), Bohdan Kulchytskyy (1), Eliott Ouellet (1), Jean Olivier Simoneau (1), Florian Hopfmueller (1), Matthew Hamer (1), Pascal Lemieux (1), Dany Lachance-Quirion (1), Baptiste Royer (2), Nicholas E. Frattini (1) ((1) Nord Quantique, (2) Département de Physique et Institut quantique, Université de Sherbrooke) View a PDF of the paper titled Quantum error correction of a grid-state qubit with state preparation and measurement errors below $10^{-3}$, by Sara Turcotte (1 and 15 other authors View PDF HTML (experimental) Abstract:Grid state qubits offer a hardware-efficient approach to large-scale fault-tolerant quantum computing. They access the information redundancy required for quantum error correction by exploiting the large Hilbert space naturally available in harmonic oscillators. Superconducting architectures are particularly suitable to implement grid state qubits due to their fast and high-fidelity operations. Grid states in superconducting circuits enable quantum error correction (QEC) with performance beyond break-even. However, the state preparation and measurements (SPAM) errors of grid states has been a significant limitation to computational performances. In this work, we leverage high-performance QEC to enable repeat-until-success state preparation of both cardinal and magic states of the single-mode grid-state qubit. We combine this with an improved measurement protocol that corrects for both finite-energy envelope and auxiliary qubit readout errors, and increases robustness to photon loss. Our experiments, using both techniques, achieve a combined state-preparation and measurement error below $10^{-3}$. This represents two orders-of-magnitude improvement over the state of the art,
arXiv Quantum PhysicsLoading...0
quantum-computingFeynman's clock and hierarchy-informed sampling for quantum error mitigation
--> Quantum Physics arXiv:2607.06752 (quant-ph) [Submitted on 7 Jul 2026] Title:Feynman's clock and hierarchy-informed sampling for quantum error mitigation Authors:Theo Saporiti View a PDF of the paper titled Feynman's clock and hierarchy-informed sampling for quantum error mitigation, by Theo Saporiti View PDF HTML (experimental) Abstract:Near-term physical implementations of quantum algorithms require efficient quantum error mitigation schemes to reduce quantum noise. In this letter we propose a new mitigation technique, by extending the applicability of our BBGKY-ISM scheme from quantum simulations of spin chains to arbitrary quantum circuits. We map executions of quantum circuits using Feynman's clock Hamiltonian to the Hamiltonian dynamics of a corresponding quantum system, whose time evolution obeys a BBGKY-like hierarchy of equations informing the BBGKY-ISM mitigation. We show that the method's classical and quantum overheads are polynomial in the circuit size and in the number of qubits. We apply our method to numerical simulations of tunable Bell state preparation circuits under state-of-the-art quantum noise, and numerically demonstrate its systematic and controllable quantum error reduction capability. Comments: Subjects: Quantum Physics (quant-ph) Cite as: arXiv:2607.06752 [quant-ph] (or arXiv:2607.06752v1 [quant-ph] for this version) https://doi.org/10.48550/arXiv.2607.06752 Focus to learn more arXiv-issued DOI via DataCite (pending registration) Submission history From: Theo Saporiti [view email] [v1] Tue, 7 Jul 2026 19:33:58 UTC (421 KB) Full-text links: Access Paper: View a PDF of the paper titled Feynman's clock and hierarchy-informed sampling for quantum error mitigation, by Theo SaporitiView PDFHTML (experimental)TeX Source view license Current browse context: quant-ph < prev | next > new | recent | 2026-07 References & Citations INSPIRE HEP NASA ADSGoogle Scholar Semantic Scholar export BibTeX cita
arXiv Quantum PhysicsLoading...0
quantum-computingPostdoctoral Fellow in “Deploying geometrically-designed algorithms”
Postdoctoral Fellow in “Deploying geometrically-designed algorithms” Application deadline: Saturday, December 12, 2026Employer web page: https://ntu.wd3.myworkdayjobs.com/Careers/job/NTU-Main-Campus-Singapore/Research...Job type: PostDocMarek Gluza is starting a group at NTU Singapore and is looking for input from a postdoc. The group will work on the entire quantum computing stack a) geometrically designed quantum algorithms, b) deploying them, c) improving quantum hardware. The formal announcement: https://ntu.wd3.myworkdayjobs.com/Careers/job/NTU-Main-Campus-Singapore/... Conversation starters: https://marekgluza.github.io/ Members of underrepresented groups are particularly encouraged to inquire early and e.g. provide a cover letter to contextualize their pathway. Competence and role fit will be evaluated by: - Form of advances communicated in your lead author publications and the breadth of your portfolio. - Your GitHub repositories. - Your ability of critical thinking, clear communication, mentoring younger peers, thought leadership and individual unique technical strengths. Log in or register to post comments
QuantikiLoading...0
quantum-computingHefei National Laboratory Team Develops Elea-Cafe Workflow for High-Precision CZ Gate Calibration
Huili Zhang and colleagues at Beijing Academy of Quantum Information Sciences and Hefei National Laboratory present a new calibration workflow that sharply enhances CZ gate fidelity. They achieved a CZ gate fidelity exceeding 99.9% on an 84-qubit processor, suppressing coherent errors to just 0.007%, and demonstrated a median fidelity of 99.25% across 72 parallel CZ gates. The workflow provides an efficient and automated method for quantum computation using superconducting quantum systems, representing a key advance in the field. Automated calibration achieves record fidelity and stability in 84-qubit superconducting processor Error rates for CZ gates dropped to 0.007%, a substantial improvement over previous methods. Comparable fidelity on large processors had previously proved difficult to achieve. Dr. Yunseong Nam and colleagues at the Institute of Quantum Technology utilised a closed-loop workflow, employing diagnostic circuits named ELEA and CAFE, to suppress population leakage and refine gate parameters with unprecedented precision. This process also enhanced the stability of the CZ gate over extended monitoring periods, lasting nine hours, establishing an efficient route to quantum computation with superconducting quantum systems. This breakthrough exceeds 99.9% CZ gate fidelity on an 84-qubit processor, overcoming limitations imposed by increased incoherent errors and demanding calibration requirements as systems scale up. A median fidelity of 99.25% was achieved across 72 concurrent CZ gates, demonstrating the scalability of the automated calibration workflow. This stability was maintained during nine hours of continuous monitoring. Despite these strong advances, maintaining such high fidelity as qubit counts increase further remains a challenge, as does demonstrate error correction beyond these initial two-qubit operations. Scaling automated calibration to enable universal quantum computation CZ gate fidelity exceeding 99.9% represents a vital step towards
Quantum ZeitgeistLoading...0
quantum-computingEuropean Consortium QUARTERNEXT Launches to Advance Certifiable Quantum-Key Distribution Systems
European Consortium QUARTERNEXT Launches to Advance Certifiable Quantum-Key Distribution Systems A multinational European deep-tech consortium named QUARTERNEXT has launched a four-year, cross-border initiative to mature and formally certify quantum-safe communication infrastructures. Coordinated by Spanish cybersecurity hardware developer Luxquanta, the project establishes a 48-month deployment pipeline that spans specialized entities across Spain, Austria, and the Netherlands. Funded under the Digital Europe Programme’s IRIS² Quantum Communication Infrastructure (QCI) framework, the partnership develops certified, industrial-grade systems to directly support the European Union’s broader EuroQCI mandate—an initiative focused on interconnecting member states via highly secure, tamper-evident communication networks. [ QUARTERNEXT Consortium Architecture ] Coordinator ──► Luxquanta (Spain) — Managing full CV-QKD structural compliance. Core Technical SMEs ──► Quside (Spain), Chilas (Netherlands), and fragmentiX (Austria). Infrastructure Links──► Telefónica (Telecom Network Carrier) & AIT (Research & Software Lead). Operational Mandate ──► Integration and formal certification of EU-made quantum hardware blocks. The technological roadmap targets the miniaturization, deployment, and standardization of Continuous-Variable Quantum Key Distribution (CV-QKD) systems. While earlier research networks successfully verified primitive quantum key exchanges, translating these frameworks into critical infrastructure requires strict regulatory compliance and the ability to operate over existing classical fiber optics without signal degradation. To minimize installation overhead for commercial telecommunications carriers, QUARTERNEXT is designing advanced coexistence frameworks that partition light frequencies, allowing fragile quantum data channels and heavy classical streams to run concurrently over the same physical optical fibers. The collective engineering execution integ
Quantum Computing ReportLoading...0
quantum-computingWhite House Quantum Summit Details Over $2.2 Billion in Support for 2028 Fault-Tolerant Computing
The White House hosted the Summit on American Quantum Innovation on July 7, 2026, to begin implementing President Trump’s June 22 Executive Orders on quantum technologies. Federal agencies announced significant funding, including over $2 billion in Commerce Department incentives and up to $200 million from the Defense Innovation Unit for quantum sensing. The Department of Energy is tasked with delivering a fault-tolerant, scientifically relevant quantum computer by 2028, supported by initiatives from the NSF, NSA, and NIST focused on research, supply chains, and manufacturing. These efforts aim to build a resilient US quantum industrial base through public-private partnerships and workforce development. The post White House Quantum Summit Details Over $2.2 Billion in Support for 2028 Fault-Tolerant Computing appeared first on The Qubit Report.
The Qubit ReportLoading...0
quantum-computingResearchers Build Quantum Circuits Using Ising Model and Time-Dependent Fields
Matthias Werner at the IUniversity of Barcelona and colleagues have found a fundamental connection between the transverse-field Ising model and standard gate-based quantum computation. The Ising model, when driven by a specifically tailored, time-dependent transverse field, simulates any quantum circuit with a polynomial increase in computational resources. This finding answers a long-standing question regarding the computational power of analogue quantum simulation platforms, such as those employing quantum annealing, and importantly, suggests inherent limitations for classically simulating this type of Ising model. The research also has implications for complexity theory and the control of quantum systems, potentially motivating improvements in simulating quantum circuits using the Ising model. Transverse-field Ising model replicates universal quantum circuits with polynomial overhead A significant advance in quantum simulation has been realised, demonstrating a polynomial increase in time, qubit number, and energy scale when simulating quantum circuits using the transverse-field Ising model. This represents a substantial improvement over previous methods, which lacked a clear pathway to universal quantum computation with predictable resource scaling. The Ising model, driven by a carefully controlled, time-varying transverse field, effectively replicates any quantum circuit, unlocking the potential for utilising analogue quantum simulation platforms for broader computational tasks. The significance of this lies in the potential to move beyond specialised optimisation problems, for which quantum annealers are currently designed, towards a more general-purpose quantum computing paradigm based on analogue principles. Previous attempts to demonstrate universality often suffered from exponential scaling of resources, rendering them impractical. This work establishes a polynomial scaling relationship, offering a more viable route to scalability, although substantial cha
Quantum ZeitgeistLoading...0
quantum-computingSEALSQ and GlobalFoundries Form Alliance to Develop Post-Quantum Semiconductor Blocks and Cryogenic CMOS Infrastructure
SEALSQ and GlobalFoundries Form Alliance to Develop Post-Quantum Semiconductor Blocks and Cryogenic CMOS Infrastructure Post-quantum hardware engineer SEALSQ Corp (Nasdaq: LAES) and foundry group GlobalFoundries (Nasdaq: GFS) have signed a strategic Memorandum of Understanding (MoU) to co-develop secure semiconductor platforms, post-quantum cryptography (PQC) IP, and cryogenic silicon control layers. The development track links GlobalFoundries’ commercial Complementary Metal-Oxide-Semiconductor (CMOS) fabrication processes and bulk manufacturing volume with SEALSQ’s hardware-based certified security cores and PQC-ready root-of-trust modules. The joint initiative focuses on moving quantum computing hardware out of boutique lab setups by manufacturing essential system control units within established, high-volume semiconductor cleanrooms. [ SEALSQ - GlobalFoundries Alliance Matrix ] Manufacturing Hub ──► GlobalFoundries high-volume U.S. and European fabrication facilities. Hardware IP Module ──► Hard macro certified PQC blocks engineered with MIPS architecture. Cryogenic Engine ──► CryoCMOS ASICs for sub-Kelvin quantum processing unit (QPU) control. Sovereign Mandate ──► Secure, traceable supply chain alignment supporting U.S. and European policies. The corporate partnership targets three primary technological segments: Certified PQC Security IP Integration: In collaboration with MIPS (a GlobalFoundries subsidiary), the engineering groups will design pre-certified PQC security IP hard macro blocks and Chiplet Hardware Security Module (CHSM) components. These functional blocks act as hardware-based roots of trust for Secure Enclaves, enabling semiconductor developers to embed hardware-level quantum-resistant protection directly during the initial silicon layout phase rather than implementing it as a post-fabrication software layer. Cryogenic CMOS (CryoCMOS) Architectures: Building on SEALSQ’s quantum ASIC design track and GlobalFoundries’ dedicated Quantum Technology S
Quantum Computing ReportLoading...0
quantum-computingMillisecond coherence times in gigahertz-frequency mechanical oscillators
MainLong-lived phonons are a compelling resource, as they permit numerous quantum operations within their coherence time, which enables high-performance quantum sensors1,2,3,4, transducers5,6,7,8 and memories9,10,11. The efficient control of long-lived phonons using optomechanical12,13,14, electromechanical15,16 and superconducting qubit systems17,18,19 has generated renewed interest in phononic device physics and technologies for quantum applications20,21. Although various mechanical oscillators have produced such long-lived phonons over a range of frequencies21,22, high-frequency (gigahertz) phonons are often desirable, as they have improved immunity to unwanted noise, permit ground-state operation at cryogenic temperatures and are more readily controlled using quantum optics and circuit quantum electrodynamics techniques21,23. In theory, crystalline media are ideal for hosting such long-lived phonons, as they have vanishing internal dissipation at cryogenic temperatures24,25,26,27. However, it has proven difficult to extend the coherence times of such gigahertz-frequency crystalline oscillators to millisecond timescales.Silicon-based nanomechanical phononic crystal resonators have shown long phonon lifetimes (>1 s) at gigahertz frequencies; however, strong coupling between phonons and the two-level system limits their coherence times to ~100 μs (refs. 10,11,14). Tight phonon confinement and strong boundary reflections within these systems make them vulnerable to complex surface interactions that may contribute to excess noise and dephasing14. Alternatively, micro-fabricated high-overtone bulk acoustic-wave resonators (μHBARs) of the type seen in Fig. 1a support gigahertz-frequency phonon modes with orders of magnitude lower surface participation13,28. In principle, lower surface participation could translate to lower dephasing rates and longer coherence times. However, in practice, μHBARs have yielded modest coherence times (<1 ms)13,23, shorter than can be
Nature Physics – QuantumLoading...0