Shows Silicon Spin Qubit Device with Five-Qubit Control Via Shuttling
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Researchers are increasingly focused on building scalable quantum processors, and a new study by Undseth, Meggiato, Wu et al, from QuTech and the Kavli Institute of Nanoscience at Delft University of Technology, alongside colleagues at TNO, details a significant step forward in this field. They have successfully demonstrated weight-four parity checks using silicon spin qubits, a crucial operation for implementing surface-code quantum error correction. This achievement is particularly noteworthy as the team constructed and verified the genuine entanglement of a five-qubit Greenberger-Horne-Zeilinger state using gate-defined semiconductor spins, the largest such state created to date, paving the way for practical experiments exploring quantum error correction with this promising technology and offering a blueprint for modular operation of sparse spin qubit arrays. Demonstrating five-qubit entanglement and surface-code parity checks via a silicon spin-qubit shuttle bus represents a significant advance in quantum computing Scientists have demonstrated a silicon spin-qubit device incorporating a shuttling bus to coherently transport qubits and enable interactions at four isolated locations termed bus stops.
The team dynamically populated the qubit array and tuned all single- and two-qubit operations using shuttling alongside quantum non-demolition (QND) spin measurements, crucially achieving this without relying on charge sensing across most of the device. This breakthrough reveals universal control of an effective five-qubit processor, with the connectivity specifically selected to form a surface-code stabilizer plaquette supporting both X- and Z-type parity checks up to weight-four. Experiments show the use of these parity checks to generate multi-qubit entanglement between all qubit combinations within the array, culminating in the successful demonstration of a five-qubit Greenberger-Horne-Zeilinger (GHZ) state. This GHZ state represents the largest ever constructed using gate-defined semiconductor spins, signifying a substantial advancement in the field. The research establishes a viable pathway for pursuing quantum error-correction (QEC) experiments with spin qubits, and the developed protocols provide a foundation for the modular calibration and operation of sparse spin qubit arrays. This work addresses a critical need for semiconductor-based spin qubits to be compatible with QEC for fault-tolerant quantum computing, leveraging their inherent advantages of small size, long coherence times, and high-fidelity operations. While previous demonstrations utilized Toffoli-like primitives for conditional correction, large-scale QEC demands repeated extraction of stabilizer measurements to map error syndromes in both space and time.
The team’s implementation of weight-four parity checks, facilitated by the shuttling bus, offers a solution to this challenge, requiring an ancillary qubit to interact with four data qubits without disrupting their quantum state. The performance of the device builds upon recent advances in coherent spin shuttling, benefiting from improvements in material uniformity and control techniques. Beyond material characterization and qubit characterization, spin shuttling is now used to implement logical gates and enable the coupling of qubits at distances exceeding the limits of kinetic or capacitive exchange. This spatial separation minimizes residual exchange interactions during qubit idling, reducing entangling crosstalk and simplifying control signal routing, ultimately decreasing calibration overhead. The study highlights the architectural benefits of sparse arrays, offering increased flexibility in qubit readout and potentially eliminating the need for bulky charge reservoirs.
Remote Qubit Control and Coherent Transport via a Silicon Spin-Shuttling Bus represent a promising path toward scalable quantum computing Scientists engineered a silicon spin-qubit device featuring a shuttling bus to coherently transport qubits between four isolated locations termed bus stops. The study pioneered a remote tuning procedure, enabling population and control of distant bus stops without relying on direct charge sensing across the entire device. Spins were placed in a superposition and shuttled to bus stops beyond the range of charge sensing, with the resulting phase measured by shuttling the spin back to the readout zone, reconstructing single-electron charge stability diagrams for all four bus stops. Researchers harnessed a four-phase traveling-wave potential to propagate spins through the bus at 1.8m/s, identifying confinement potential roughness through sudden steps in measured trends. The shuttling operation was designed to be adiabatic, resulting in a phase pickup on the spin that could be calibrated or negated using a spin echo. This work bypassed conventional tuning methods that depend on charge sensors by reconstructing charge stability diagrams from shuttled spin phase measurements, inferring capacitive coupling and compensating through gate virtualization.
The team developed a method to load new spins into the array on-demand from a sensor, functioning as an electron reservoir, in approximately 10μs. Calibration of two-qubit logic involved initializing an ancilla qubit to |↓⟩, shuttling it adjacent to a bus stop for 10μs, and using the polarization of the returned spin to probe for tunneling and spin mixing. This approach enabled inference of two-electron charge stability diagrams and probing of exchange splitting, achieving tunability on the order of 10MHz suitable for resonant controlled rotations and adiabatic controlled-phase operations. To operate the five-qubit processor, the research group loaded all four data qubits into the bus stops via shuttling and employed a non-demolition (QND) protocol with real-time feedback to initialize all qubits in the |↓⟩ ground state, except for one initialized to |↑⟩. This protocol, combined with coherent shuttling, single-qubit electron spin resonance, and two-qubit exchange, facilitated the construction of a five-qubit Greenberger-Horne-Zeilinger (GHZ) state, representing the largest such state created with gate-defined semiconductor spins. Demonstrated five-qubit control and entanglement via dynamic qubit shuttling on a superconducting processor Scientists have demonstrated a silicon spin-qubit device featuring a shuttling bus capable of coherently transporting qubits to four distinct locations termed bus stops.
The team dynamically populated the qubit array and tuned all single- and two-qubit operations using shuttling and non-demolition spin measurements, largely without direct charge access. This work achieved universal control of an effective five-qubit processor and implemented the connectivity necessary to form a surface-code stabilizer plaquette supporting X- and Z-type parity checks up to weight-four.
Results demonstrate the generation of multi-qubit entanglement between all qubit combinations within the array, culminating in the creation of a genuine five-qubit Greenberger-Horne-Zeilinger (GHZ) state. This GHZ state represents the largest such state constructed to date using gate-defined semiconductor spins. Experiments revealed a shuttling speed of 1.8m/s achieved using a four-phase traveling-wave potential. Measurements confirm that the shuttling operation is adiabatic, resulting in a phase pickup that can be calibrated or negated with a spin echo. The researchers pioneered a remote tuning procedure, enabling population and control of distant bus stops without local charge sensing. By shuttling a spin to a bus stop and measuring the resulting phase after pulsing the double-dot system, single-electron charge stability diagrams were reconstructed for all four bus stops. Analysis of the interdot transition slope allowed inference of the relative capacitive coupling between gates and bus stop quantum dots, facilitating gate virtualization. Data shows that electrostatic crosstalk between intermediate gates in the shuttling bus and bus stops is minimal, allowing for modular charge tuning of the array. Dynamic qubit manipulation achieves five-qubit entanglement and surface code demonstration on superconducting hardware Scientists have demonstrated a silicon spin-qubit device featuring a shuttling bus capable of coherently transporting qubits between four distinct locations, termed bus stops. This innovative architecture dynamically populates the qubit array and enables tuning of both single- and two-qubit operations utilising shuttling and non-demolition spin measurements, largely circumventing the need for charge access within the device. The researchers achieved universal control over an effective five-qubit processor and implemented the connectivity necessary to construct a surface-code stabilizer plaquette, supporting X- and Z-type parity checks up to weight-four. This work culminated in the generation of multi-qubit entanglement across all qubit combinations within the array, and the successful demonstration of a five-qubit Greenberger-Horne-Zeilinger (GHZ) state, representing the largest such state created using gate-defined semiconductor spins to date. The findings signify a substantial step towards realising practical quantum error correction with spin qubits, and the developed protocols establish a foundation for the modular calibration and operation of sparse spin qubit arrays. The authors acknowledge limitations related to device complexity and the challenges inherent in scaling up such architectures. Future research will likely focus on improving qubit coherence times and exploring more complex error-correction schemes utilising this platform. 👉 More information 🗞 Weight-four parity checks with silicon spin qubits 🧠 ArXiv: https://arxiv.org/abs/2601.23267 Tags: