Readypower Framework Enables Interpretable and Handy Architectural Power Analysis

Accurate power estimation represents a critical challenge in modern processor design, demanding techniques that balance precision with computational efficiency. Qijun Zhang, Shang Liu, and Yao Lu, alongside colleagues at Hong Kong University of Science and Technology, address this need with a novel power modelling framework called ReadyPower.

The team identifies key limitations in existing approaches, namely the unreliability, limited interpretability, and practical difficulties associated with machine learning-based models, while also acknowledging inaccuracies in traditional analytical methods. ReadyPower overcomes these challenges by bridging the gap between theoretical models and real-world processor implementation, incorporating parameters at multiple levels of abstraction into a refined version of the established McPAT model. This results in a significantly more accurate and usable tool, achieving over 20% lower error rates and a greater correlation with actual power consumption compared to machine learning alternatives on both BOOM and XiangShan CPU architectures. The research overcomes limitations found in existing approaches by combining analytical modeling with machine learning, adapting to new designs and technologies without extensive manual calibration. This provides a more flexible and automated way to estimate power consumption during the CPU design process. AutoPower utilizes a power group decoupling technique to identify and model different power-consuming components separately, simplifying the modeling process and improving accuracy. Transfer learning further reduces the amount of data needed to train the model for new CPU designs by leveraging information from the Register-Transfer Level (RTL) design, enabling pre-synthesis Power, Performance, and Area (PPA) estimation for early design optimization.

The team collects data through simulation and potentially real-world measurements, extracting relevant features from the CPU design, such as clock frequency, voltage, area, and switching activity. Machine learning algorithms, such as XGBoost, predict power consumption based on these features, and experiments demonstrate the accuracy and efficiency of AutoPower, offering a valuable tool for computer architects and power estimation engineers. Multi-Level Power Modeling for Modern Processors Scientists developed ReadyPower, a new analytical framework designed to provide reliable, interpretable, and readily usable power modeling for modern processors. The research addresses limitations in both classical analytical models and machine learning-based approaches by systematically introducing new parameters at the architecture, implementation, and technology levels, building upon the widely used McPAT model.

The team engineered a multi-level parameter system, with architecture-level parameters reflecting microarchitectural design decisions, implementation-level parameters capturing power characteristics dependent on the Register Transfer Level (RTL) design, and technology-level parameters derived solely from process technology libraries. This tiered approach allows for precise calibration across different design stages and technologies. Experiments refined the values of the new parameters using known processor designs, effectively learning the discrepancies between the analytical model and actual implementations.

Results demonstrate that ReadyPower achieves greater than 20% lower mean absolute percentage error (MAPE) and a greater than 0. 2 higher correlation coefficient R compared to machine learning baselines on both BOOM and XiangShan CPU architectures, while maintaining consistent accuracy even when testing data falls outside the training data distribution. The fully open-sourced framework provides a ready-to-use solution for designers seeking accurate and interpretable power modeling capabilities, linking each new parameter to explicit physical parameters within the processor, allowing designers to understand the power calculation mechanism. ReadyPower Accurately Models Modern Processor Power Consumption Scientists achieved a breakthrough in power modeling for modern processors by introducing ReadyPower, a new analytical framework designed to be reliable, interpretable, and readily usable. Recognizing the limitations of traditional analytical models and machine learning-based approaches, they developed ReadyPower to bridge the gap between processor implementation and analytical modeling by incorporating architecture-level, implementation-level, and low-level parameters into the widely adopted McPAT model. Researchers generated 15 configurations for BOOM and 10 for XiangShan, simulating real-world workloads using eight different tests. Ground truth power labels were obtained through rigorous RTL code generation, simulation, and logic synthesis, and event parameters were collected through architecture-level performance simulation using gem5. The data shows that ReadyPower consistently outperforms existing analytical and machine learning-based power models across all training scenarios. Averaged across these scenarios, ReadyPower achieves greater than 20% lower mean absolute percentage error (MAPE) and a greater than 0. 2 higher correlation coefficient R compared to baseline methods on both BOOM and XiangShan, offering a valuable tool for early power optimization and design space exploration.

Accurate Power Modelling Across Design Levels This work presents ReadyPower, a new analytical framework for modeling power consumption in processor design. Researchers addressed limitations in existing methods, namely the inaccuracies of classical analytical models and the challenges associated with adopting machine learning-based approaches, such as a lack of reliability and interpretability. ReadyPower improves accuracy by bridging the gap between theoretical processor models and real-world implementations through the introduction of parameters at the architecture, implementation, and technology levels.

The team demonstrated that ReadyPower achieves significantly improved performance compared to both machine learning baselines and existing analytical models, exhibiting over 20% lower error and a higher correlation with actual power measurements on both BOOM and XiangShan CPU architectures. Notably, the framework demonstrates strong transferability between different technology nodes, maintaining accuracy when applied to designs fabricated using different manufacturing processes.

This research delivers a practical and reliable tool for architects seeking to optimise power consumption during the early stages of processor design, offering a compelling addition to existing methodologies. 👉 More information 🗞 ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework 🧠 ArXiv: https://arxiv.org/abs/2512.14172 Tags: