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SEALSQ and Lattice Partner on Post-Quantum Security for FPGAs

Quantum Daily
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⚡ Quantum Brief
SEALSQ and Lattice Semiconductor have partnered to embed TPM-based post-quantum cryptography into Lattice’s FPGA platforms, targeting quantum-resistant security for edge and embedded systems. The collaboration integrates SEALSQ’s QS7001 and QVault TPM technologies with Lattice’s secure FPGAs, creating a hardware-level proof-of-concept for mission-critical applications. A live demonstration of the unified FPGA-TPM solution will debut at Embedded World 2026 (March 10–12, Nuremberg), showcasing crypto updatability and quantum resilience at the edge. Both companies align with NIST’s post-quantum standards and the 2026 Year of Quantum Security initiative, emphasizing urgent infrastructure upgrades against quantum threats. The partnership accelerates industry adoption by combining Lattice’s low-power FPGAs with SEALSQ’s post-quantum expertise, offering scalable security for high-performance embedded designs.
SEALSQ and Lattice Partner on Post-Quantum Security for FPGAs

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Insider Brief SEALSQ Corp and Lattice Semiconductor announced a collaboration to integrate TPM-based post-quantum security into select Lattice FPGA platforms. A proof-of-concept combines Lattice secure FPGAs with SEALSQ’s QS7001 and QVault TPM secure root-of-trust technologies to demonstrate embedded post-quantum cryptography at the hardware level. The joint solution targets mission-critical edge and embedded applications and will be demonstrated at Embedded World 2026. PRESS RELEASE — SEALSQ Corp (NASDAQ: LAES) (“SEALSQ” or “Company”), a company that focuses on developing and selling Semiconductors, PKI, and Post-Quantum technology hardware and software products, today announced its collaboration with Lattice Semiconductor (NASDAQ: LSCC) to integrate TPM-based advanced post-quantum security capabilities into select Lattice FPGA solutions. This collaboration addresses the rapidly growing need for quantum-resistant technologies in mission-critical applications for edge computing and other high-stakes environments. “This collaboration perfectly illustrates SEALSQ’s strategy of extending our leadership in post-quantum security beyond direct OEM sales,” said Bernard Vian, General Manager of SEALSQ. “We continue to deliver ready-to-deploy and custom secure chips directly to customers, while also leveraging our deep expertise in post-quantum hardware and flexible semiconductor design capabilities to empower strategic partners across the industry. Collaborating with Lattice allows us to bring our cutting-edge, tailored PQC protection to their FPGA platforms, accelerating the secure transition to quantum-resistant systems for a broad range of high-performance applications.” “Lattice is committed to advancing security for our customers as the industry prepares for a post-quantum future. By combining SEALSQ’s QS7001 and QVault TPM based post‑quantum capabilities with Lattice’s long-running leadership in secure, power‑efficient FPGA platforms, we further expand our quantum-capable portfolio of solutions that give our customers a variety of ways to achieve quantum-resilience in their designs with strong assurance and performance,” said Eric Sivertson, Vice President of Security Business at Lattice Semiconductor. A Proof-of-Concept of the FPGA-TPM solution integrates a Lattice secure FPGA with SEALSQ’s PQC based QS7001and QVault TPM secure Root-of-Trust (RoT). The PoC demonstrates the technical feasibility of embedding TPM-based post-quantum cryptography directly into FPGA architectures and will serve as a foundational reference design for enhanced edge security. By combining Lattice’s expertise in low power programmable FPGAs and recognized leadership in security with SEALSQ’s specialized post-quantum capabilities, this collaboration demonstrates technical interoperability and supports broader industry efforts toward next-generation quantum-secure hardware. This initiative aligns with the launch of the Year of Quantum Security 2026 (YQS2026) in Washington, D.C., where stakeholders from government, industry, and academia converged around a shared conclusion: quantum security is no longer theoretical, it is now an infrastructure and governance imperative. Both companies support industry efforts to advance post-quantum standards recommended by organizations such as NIST.

See Live Demonstrations at Embedded World 2026 The new post-quantum security PoC demo will be on display at Embedded World 2026 from March 10-12, 2026 in Nuremberg, Germany. Visit Lattice’s exhibit at Hall 4, Booth #528 to experience the unified FPGA-TPM architecture delivering a trusted root of resilience and crypto updatability at the edge, and hear more from Eric Sivertson during his Embedded World conference on the topic (Trusted Resilience Edge: Unified FPGA-TPM for Post-Quantum Cryptography RED & Cyber Resilience Act) on Tuesday March 10th at 5PM.

Mohib Ur Rehman LinkedIn Mohib has been tech-savvy since his teens, always tearing things apart to see how they worked. His curiosity for cybersecurity and privacy evolved from tinkering with code and hardware to writing about the hidden layers of digital life. Now, he brings that same analytical curiosity to quantum technologies, exploring how they will shape the next frontier of computing. Share this article:

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Source: Quantum Daily