Quantum Error Detection Achieves 99.3% Leakage Conversion with Biased-Erasure Cavity Qubit
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Researchers are increasingly focused on developing more robust quantum bits for scalable quantum computation. Jiasheng Mai from Southern University of Science and Technology, Qiyu Liu and Xiaowei Deng from the International Quantum Academy, and colleagues demonstrate a significant advance in this field with a hardware-efficient biased-erasure qubit. Their work realises this qubit using a single microwave cavity, exhibiting a substantial erasure bias ratio of over 265 and achieving logical state assignment errors below 1%. Crucially, this research establishes a strong error hierarchy, with postselected error rates exceeding the erasure rate by factors of 31 and 15, and a coherence gain of approximately 6.0, paving the way for concatenations into outer-level stabilizer codes and ultimately, fault-tolerant quantum computing.
The team achieved this breakthrough by realizing a qubit exhibiting an erasure bias ratio exceeding 265, meaning erasures originate predominantly from one logical basis state.
This research utilizes a transmon ancilla to perform logical measurements and mid-circuit erasure detections, enabling logical state assignment errors below 1% and converting over 99.3% of leakage errors into detectable erasures. By employing this method, the researchers established a strong error hierarchy within the logical subspace, exceeding the erasure error rate by factors of 31 and 15 with effective logical relaxation and dephasing rates of (6.2ms)−1 and (3.1ms)−1, respectively. This work builds upon the principle that biased-erasure qubits offer relaxed threshold requirements for quantum error correction, surpassing the capabilities of traditional dual-rail approaches. The implemented 02 qubit, leveraging the vacuum and two-photon Fock states, minimizes hardware overhead compared to previous encoding schemes requiring multiple qubits or cavities. Experiments show that the ancilla-assisted measurements and mid-circuit erasure detections are crucial for efficiently identifying and flagging leakage errors as erasures, thereby improving the qubit’s performance. Postselection against these erasures further enhances coherence, resulting in a gain of approximately 6.0 beyond the break-even point established by the best physical qubit encoded in the cavity’s two lowest Fock states. Furthermore, randomized benchmarking with interleaved erasure detections revealed a residual logical gate error of only 0.29%, a substantial improvement over the erasure probability per gate. This compact and hardware-efficient platform for biased-erasure qubits promises future concatenations into outer-level stabilizer codes, paving the way towards fault-tolerant quantum computation. The demonstrated strong error hierarchy and low logical gate error rates signify a substantial step towards building more robust and scalable quantum systems capable of performing complex calculations.
This research establishes a promising pathway for advancing quantum error correction and realizing practical quantum technologies.
Fock State Discrimination via Modulo Parity Measurements Scientists engineered a hardware-efficient biased-erasure qubit using the vacuum and two-Fock states of a single microwave cavity to advance quantum error correction. The research team implemented cascaded photon-number modulo parity measurements, mod(n, 2) and mod(n, 4), to simultaneously identify all four Fock states |n⟩ with n ∈ {0, 1, 2, 3} based on binary outcomes. Logical assignment errors, erasure identification errors, and leakage identification errors were then determined by comparing prepared states with measured outcomes, revealing an average logical assignment error of 0.97 ±0.03%. This approach enables precise characterization of qubit performance and facilitates the identification of error sources. To assess mid-circuit erasure detection, the study pioneered an experimental sequence inserting an erasure check between state preparation and final logical measurement. This yielded quantitative metrics for false-positive and false-negative errors, demonstrating a false-positive error of 0.22 ±0.02% and a false-negative error of 0.69 ±0.03%, indicating that over 99.3% of leakage events were successfully converted into detectable erasures.
The team harnessed Wigner tomography to extract the phase coherence of the erasure logical qubit, employing a sequence with evenly inserted erasure checks over a total evolution duration of 150μs. Analysis of the resulting data revealed an induced dephasing error of 0.26% per erasure detection, highlighting the precision of the error mitigation strategy. Experiments employed a sequence initiating with preparation of the erasure qubit in logical state |1L⟩, followed by M rounds of mid-circuit erasure detections at a repetitive interval of τ = 11.9μs. The system delivers a single cycle duration of T = 13.0μs, carefully balanced to minimize multiphoton-loss-induced logical relaxation against detection-induced errors. Subsequent logical measurement via Wigner tomography reconstructed the logical state, allowing quantification of the logical relaxation rate and yielding an erasure rate of γerasure = (0.2ms)−1 through exponential fitting. This methodology achieves effective logical relaxation and dephasing rates of and , respectively, exceeding the erasure error rate by factors of 31 and 15, thus establishing a strong error hierarchy. Randomized benchmarking with interleaved erasure detections revealed a residual logical gate error of 0.29%, demonstrating the potential for concatenations into outer-level stabilizer codes towards fault-tolerant quantum computation. The work establishes a compact and hardware-efficient platform for biased-erasure qubits, exceeding the thresholds of 0.5% erasure error and 0.5% Pauli error required for standard erasure qubits and promising even more relaxed thresholds due to the structured erasure channel. Biased-erasure qubit shows low logical error rates despite Scientists have realized a hardware-efficient biased-erasure qubit encoded in the vacuum and two-Fock states of a single microwave cavity, demonstrating a significant advance in quantum error correction. The qubit exhibits an erasure bias ratio exceeding 265, meaning erasures originate predominantly from the |1L⟩ logical basis state. By employing a transmon ancilla for logical measurements and mid-circuit erasure detections, the team achieved logical state assignment errors below 1%, specifically measuring 0.97 ±0.03%. Furthermore, they converted over 99.3% of leakage errors into detected erasures, enhancing the qubit’s resilience to noise. Experiments revealed that after postselection against erasures, the effective logical relaxation and dephasing rates were and , respectively. These postselected error rates surpass the erasure error rate by factors of 31 and 15, establishing a robust error hierarchy within the logical subspace. Measurements confirm a coherence gain of approximately 6.0 beyond the break-even point established by the best physical qubit encoded in the two lowest Fock states of the cavity. This substantial improvement highlights the efficacy of the erasure-based error correction scheme. The researchers characterized single-qubit logical gates using randomized benchmarking interleaved with mid-circuit erasure detections, obtaining a residual logical gate error of 0.29%. This gate error is approximately 16times lower than the erasure probability per gate, demonstrating a substantial reduction in logical operation errors. The storage cavity exhibited a single-photon lifetime of 0.47ms, a Ramsey dephasing time of 0.74ms, and a thermal excitation population of 0.72%, indicating single-photon loss as the dominant error channel. Data shows the erasure rate from |1L⟩ to |E⟩ was measured at (0.24ms)−1, substantially larger than the erasure rate from |0L⟩ to |E⟩ of (64.7ms)−1, confirming the significant erasure bias. Logical measurement employed cascaded photon-number modulo parity measurements, achieving an average logical assignment error of 0.97 ±0.03%. Mid-circuit erasure detection yielded false-positive and false-negative fractions of 0.22 ±0.02% and 0.69 ±0.03%, respectively, demonstrating high fidelity erasure flagging. This work establishes a compact platform for biased-erasure qubits, paving the way for concatenations into outer-level stabilizer codes towards fault-tolerant quantum computation. Biased-erasure qubit demonstrates strong error suppression capabilities Scientists have experimentally realised a biased-erasure qubit encoded using the vacuum and two-photon Fock states of a single superconducting microwave cavity. This qubit demonstrates a substantial erasure bias ratio exceeding 265, indicating that erasures predominantly originate from one logical basis state. Employing a transmon ancilla, the researchers achieved logical state assignment errors below 1% and successfully converted over 99.3% of leakage errors into detectable erasures. Following postselection against erasures, the effective logical relaxation and dephasing rates were significantly improved, exceeding the erasure error rate by factors of 31 and 15 respectively, thus establishing a strong error hierarchy within the logical subspace. Randomized benchmarking, incorporating interleaved erasure detections, revealed a residual logical gate error of 0.29%. The authors acknowledge that the measured erasure rate during gate operations was higher than the idling erasure rate, attributed to leakage from control pulses. Future work could focus on utilising the third level of the transmon ancilla for fault-tolerant parity measurements and exploring higher-order encodings to detect multi-photon loss events. These findings establish a compact and hardware-efficient platform for biased-erasure qubits, offering a promising building block for constructing outer-level stabilizer codes towards fault-tolerant quantum computation. The demonstrated coherence gain of approximately 6.0 beyond the break-even point highlights the potential of this approach. Further development of entangling operations between these qubits is a critical next step, alongside exploring potential applications in quantum-enhanced metrology, where erasure detection could improve sensitivity. 👉 More information 🗞 A biased-erasure cavity qubit with hardware-efficient quantum error detection 🧠 ArXiv: https://arxiv.org/abs/2601.21616 Tags: