Quantum Compilation Speeds up 100x, Bringing Practical Quantum Computers Closer

Researchers are tackling the challenge of efficiently translating complex quantum algorithms into instructions for near-term quantum hardware. Aaron Hoyt from University of Washington and Pacific Northwest National Laboratory, alongside Meng Wang and Fei Hua from Pacific Northwest National Laboratory, et al., present QASMTrans, a novel end-to-end quantum compilation framework designed for just-in-time deployment. This work is significant because QASMTrans achieves over 100x faster compilation speeds than existing tools like Qiskit on certain circuits, while maintaining comparable fidelity and uniquely offering direct integration with hardware control systems via pulse generation. By bridging the gap between logical circuits and physical implementation, and incorporating noise-aware optimisation and circuit space sharing, QASMTrans facilitates the development and execution of real-time adaptive quantum algorithms on current quantum processing units.

Rapid Quantum Circuit Transpilation via Pulse-Level Gate Set Optimisation Scientists have unveiled QASMTrans, a high-performance quantum compiler designed to rapidly translate abstract quantum algorithms into device-specific control instructions. This C++-based framework achieves over 100x faster compilation than existing tools like Qiskit for certain circuits, enabling the transpilation of large, complex circuits in a matter of seconds. QASMTrans distinguishes itself by offering complete, end-to-end device-pulse compilation and direct integration with quantum control systems such as QICK, effectively bridging the gap between logical circuits and the underlying hardware. The research focuses on accelerating the process of transpilation, which converts high-level quantum circuits into a format compatible with the limitations of near-term quantum devices. By employing latency-aware Application-tailored Gate Sets at the pulse level, QASMTrans identifies critical sequences within a circuit and generates optimized pulse schedules using pre-defined circuit designs. Validated through pulse-level simulations using QuTiP, this approach demonstrably reduces execution latency and improves final-state fidelity by up to 12% in tested circuits. Furthermore, QASMTrans implements device-aware, noise-adaptive transpilation that leverages device calibration data to strategically place circuit elements on high-quality qubits. This targeted approach minimizes transpilation time while maintaining comparable fidelity, and introduces circuit space sharing through calibration-aware device partitioning, allowing for the concurrent execution of multiple circuits on a single quantum processing unit. The compiler’s entirely self-contained design, free from external library dependencies, simplifies practical deployment across diverse platforms. Validation across IBM, Rigetti, IonQ, and Quantinuum platforms confirms fidelity deviations of less than 1% compared to Qiskit, alongside consistent performance ranging from ARM-based embedded devices to high-performance computing systems. By integrating fast compilation, pulse-level control, and noise-aware optimization, QASMTrans facilitates the implementation of real-time adaptive algorithms like ADAPT-VQE and ADAPT-QAOA, paving the way for more dynamic and efficient quantum computation. QASMTrans compiler architecture and QASM code processing A lightweight, high-performance C++ compiler named QASMTrans forms the basis of this work, bridging abstract quantum algorithms to device-level control and enabling just-in-time deployment on quantum processing unit testbeds. The compiler achieves fast transpilation times, exceeding 100x the speed of Qiskit on certain circuits while maintaining comparable circuit quality, allowing for the transpilation of large, high-depth circuits in seconds. QASMTrans uniquely offers end-to-end device-pulse compilation and direct quantum control integration with QICK, closing the gap between logical circuits and hardware control for closed-loop optimization. The initial stage of the process involves parsing input QASM code using Lexertk, a high-performance C++ lexer, to tokenize the code and define valid syntax rules. Following tokenization, the parser flattens qubit register indices into a singular range, streamlining transpilation and simulation by replacing the standard REG_NAME[INDEX] qubit addressing with a one-dimensional qubit range. Classical registers, used to store measurement outcomes, are also tracked to ensure accurate operations throughout the process. Gate decomposition is then performed, systematically breaking down three-qubit gates into combinations of one- and two-qubit gates, such as decomposing the CCX gate into CX and T gates. A Directed Acyclic Graph is generated to represent gate dependencies, with vertices denoting physical qubits and edges representing coupling links. Concurrently, a coupling graph is generated from a JSON file detailing hardware specifications, where vertices represent qubits and edges represent connections, which is essential for routing and mapping. Routing and mapping align the quantum circuit to the target quantum machine’s topology, introducing SWAP gates as needed, initially employing the Sabre algorithm. The circuit is further decomposed into basis gates specific to the hardware, such as those used by Rigetti or Quantinuum, before a final pulse compilation pass translates pulses into a pulse schedule. Simulation-aware constrained routing limits the number of qubits used during transpilation, reducing both transpilation and simulation time, while qubit priority rescheduling optimizes qubit mapping based on user-defined priorities. QASMTrans delivers accelerated quantum compilation with reduced error and latency Logical error rates reached 2.9% per cycle during operation of the QASMTrans compiler, demonstrating high performance in complex circuits. This lightweight, C++-based quantum compiler achieves more than 100x faster compilation than Qiskit on certain circuits while maintaining comparable circuit quality, enabling transpilation of large, high-depth circuits in seconds. QASMTrans offers end-to-end device-pulse compilation and direct quantum control integration with QICK, bridging the gap between logical circuits and hardware control for closed-loop optimization. The research supports latency-aware Application-tailored Gate Sets at the pulse level, identifying high-impact gate sequences and synthesizing optimized pulse schedules using pre-defined robust circuit ansatz. Validated through integrated QuTiP pulse-level simulation, this approach significantly reduces execution latency and improves final-state fidelity by up to 12% in tested circuits. QASMTrans implements device-aware, noise-adaptive transpilation utilizing device calibration data for circuit placement on high-quality qubits, reducing transpilation-pass time while maintaining comparable fidelity. Furthermore, the system introduces circuit space sharing via calibration-aware device partitioning, enabling concurrent execution of multiple circuits or shots on a single QPU. Performance comparisons on VQE-UCCSD circuits reveal QASMTrans achieves nearly a twofold reduction in compilation time relative to Qiskit O3, as demonstrated in scaling tests against increasing qubit numbers. Analysis of circuit depth shows QASMTrans produces comparable results to Qiskit O3, even while achieving faster compilation speeds. QASMTrans is entirely self-contained with no external library dependencies, facilitating practical deployment and serving as a baseline for implementing advanced transpilation technologies and supporting novel devices. The framework comprises an IO module, a configuration module, an optimization module, and a main transpiler component, all working in concert to efficiently parse and compile large QASM circuits. Optimised pulse compilation and noise-adaptive qubit allocation for enhanced quantum fidelity Scientists have developed QASMTrans, a high-performance quantum compiler implemented in C++, designed to translate abstract quantum algorithms into device-specific control instructions for quantum processing units (QPUs). This compiler achieves significantly faster transpilation times, exceeding 100times the speed of existing tools like Qiskit for certain circuits, while maintaining comparable circuit quality. QASMTrans uniquely offers complete device-pulse compilation and integrates directly with quantum control systems, enabling closed-loop optimisation and just-in-time deployment on QPU testbeds. The framework incorporates latency-aware Application-tailored Gate Sets, optimising pulse schedules on critical circuit paths and potentially improving final-state fidelity by up to 12 per cent. Device-aware, noise-adaptive transpilation utilises device calibration data to strategically place circuit elements on high-quality qubits, reducing compilation time and preserving fidelity. Furthermore, QASMTrans introduces circuit space sharing through calibration-aware device partitioning, allowing concurrent execution of multiple circuits. Its self-contained nature, with no external dependencies, facilitates practical deployment across various platforms, from embedded devices to high-performance computing systems, achieving speedups of up to 171times compared to Qiskit. The authors acknowledge limitations including the current scope of front-end optimisation passes and device support. Future research will focus on expanding these areas, incorporating advanced gate cancellation techniques and extending compatibility to distributed quantum systems and cavity-based architectures. Validation of optimised pulses through established calibration pipelines and integration with commercial QPU control systems are also planned. These developments aim to establish QASMTrans as a foundational tool for quantum compilation research and a practical resource for optimising and executing complex quantum algorithms on near-term quantum devices. 👉 More information 🗞 QASMTrans: An End-to-End QASM Compilation Framework with Pulse Generation for Near-Term Quantum Devices 🧠 ArXiv: https://arxiv.org/abs/2602.05154 Tags: