IQM and Zurich Instruments Develop Real-Time QEC via NVIDIA NVQLink
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IQM and Zurich Instruments Develop Real-Time QEC via NVIDIA NVQLink IQM Quantum Computers and Zurich Instruments have launched a joint project to build a real-time Quantum Error Correction (QEC) demonstrator integrated with the NVIDIA NVQLink platform. The system utilizes IQM’s 20-qubit superconducting quantum processor and the newly developed Zurich Instruments ZQCS Quantum Control System to establish a high-performance control loop. This architecture is designed to move beyond passive error monitoring by enabling active, low-latency feedback necessary for maintaining stable logical qubits. The demonstrator serves as a technical blueprint for the industrial-grade integration of superconducting hardware into standard enterprise datacenter environments. The technical core of the demonstrator is the NVIDIA NVQLink interconnect, which provides a direct, low-latency link between the quantum control electronics and GPU-accelerated classical compute nodes. NVQLink facilitates RDMA over Ethernet to achieve an end-to-end latency of less than 4 microseconds (μs), enabling the high-throughput data transfer required for real-time error decoding. By offloading complex syndrome decoding tasks to NVIDIA GPUs, the system can process error detections and issue corrective feedback within the coherence time of the physical superconducting qubits. This integration utilizes the NVIDIA CUDA-Q platform to unify quantum kernels and classical control tasks into a single, coherent programming environment. By aligning the quantum processing unit (QPU), control electronics, and classical acceleration within a singular operational architecture, the project provides a scalable path toward fault-tolerant computing. The ZQCS control system is specifically engineered to handle the synchronized timing requirements of the 20-qubit array while interfacing with the NVQLink platform for continuous calibration and active error mitigation. This project transitions quantum infrastructure from a peripheral, API-based service to a native, high-performance peer within the supercomputing stack, allowing for the deployment of logical qubits with error rates in the targeted range of $10-5 to $10-6 for future industrial applications. For further details on the NVQLink architecture and the 20-qubit superconducting hardware, consult the official IQM announcement here. March 16, 2026 Mohamed Abdel-Kareem2026-03-16T18:23:06-07:00 Leave A Comment Cancel replyComment Type in the text displayed above Δ This site uses Akismet to reduce spam. Learn how your comment data is processed.