IBM Publishes Reference Architecture for Quantum-Centric Supercomputing

IBM Publishes Reference Architecture for Quantum-Centric Supercomputing IBM released a reference architecture for Quantum-Centric Supercomputing (QCSC), a technical framework that defines the integration of Quantum Processing Units (QPUs) into high-performance computing (HPC) environments. This modular blueprint establishes how QPUs, Graphics Processing Units (GPUs), and Central Processing Units (CPUs) operate as a unified stack to address computational problems in chemistry, materials science, and optimization. The architecture is structured into four functional layers: the application layer, application middleware, system orchestration, and hardware infrastructure, designed to replace manual workload management with automated, coordinated workflows. The application layer utilizes libraries to decompose complex problems into segments for classical and quantum execution, while the middleware layer provides the necessary programming models. IBM uses the Qiskit software ecosystem to translate these segments into hardware-optimized quantum circuits, complemented by standard classical protocols such as MPI, OpenMP, and SHMEM. The release of Qiskit v2.0 and v2.1 introduced a C foreign function interface and the Executor primitive, enabling deeper integration with custom classical hardware and advanced error mitigation techniques. This middleware facilitates the communication required for iterative hybrid algorithms, such as Sample-based Krylov quantum diagonalization (SKQD) and Sample-based quantum diagonalization (SQD). System orchestration is managed through the Quantum Resource Management Interface (QRMI), an open-source, vendor-agnostic library that abstracts hardware-specific details for resource acquisition and task monitoring. By integrating with established workload managers like Slurm via SPANK plugins, QRMI allows quantum resources to be scheduled alongside classical nodes in hybrid jobs. This orchestration layer manages the execution timescales of quantum circuits, accounting for potential delays introduced by error mitigation or real-time error correction. The integration allows researchers to automate job scheduling and data transfer between disparate systems, which previously required manual intervention. The hardware infrastructure is categorized into three integrated levels based on proximity and interconnect latency: the quantum system, partner scale-up co-located systems, and partner scale-out systems. The innermost level contains the QPU and a classical runtime featuring FPGAs and ASICs for low-latency operations like mid-circuit measurements. Scale-up systems connect to the quantum hardware via near-time interconnects such as RDMA over Converged Internet or NVQLink to support intensive error detection and mitigation. Scale-out systems comprise cloud-based or on-premises CPU and GPU clusters linked via high-bandwidth interconnects for broader pre-processing and post-processing tasks. Technical validation of the QCSC architecture has been established through several scientific use cases, including Cleveland Clinic’s simulation of a 303-atom tryptophan-cage protein and RIKEN’s calculation of iron-sulfur clusters using the Fugaku supercomputer and an IBM Quantum Heron processor. Other collaborations involving the University of Manchester, Oxford University, ETH Zurich, EPFL, and the University of Regensburg utilized the framework to verify the electronic structure of engineered molecules. The roadmap for QCSC evolution identifies three phases: quantum systems as specialized compute offload engines, heterogeneous systems coupled through advanced middleware, and fully co-designed hardware-software architectures for hybrid computational workflows. For the complete technical blueprint and roadmap, consult the official IBM press release here, the IBM Research blog here, the technical note here, and the full technical paper on arXiv here. March 12, 2026 Mohamed Abdel-Kareem2026-03-12T12:52:44-07:00 Leave A Comment Cancel replyComment Type in the text displayed above Δ This site uses Akismet to reduce spam. Learn how your comment data is processed.