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D-Wave Systems Demonstrates On-Chip Cryogenic Control for Gate-Model Qubits

Quantum Computing Report
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D-Wave demonstrated scalable on-chip cryogenic control for gate-model qubits, expanding its hardware portfolio beyond annealing systems. The breakthrough validates its multiplexed control architecture for universal quantum computing. The innovation addresses the "wiring bottleneck" by integrating control logic directly onto the quantum processor, reducing reliance on room-temperature control lines that limit scalability in superconducting systems. Using superconducting bump bonding, D-Wave combined a fluxonium qubit chip with a multilayer control chip, enabling high-density interconnects while maintaining qubit fidelity and reducing thermal load. Developed with NASA JPL, the architecture uses multiplexed digital-to-analog converters to manage thousands of qubits with fewer bias wires, offering a more scalable solution than competitors' approaches. This positions D-Wave as the sole commercial provider developing both annealing and gate-model systems on a shared platform, potentially accelerating fault-tolerant quantum computing timelines.
D-Wave Systems Demonstrates On-Chip Cryogenic Control for Gate-Model Qubits

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D-Wave Systems Demonstrates On-Chip Cryogenic Control for Gate-Model Qubits D-Wave Quantum Inc. (NYSE: QBTS) has successfully demonstrated scalable on-chip cryogenic control for gate-model qubits, representing a significant technical expansion of its hardware portfolio. The successful validation of this technology confirms that the multiplexed control architecture originally developed for D-Wave’s commercial annealing systems is transferable to a universal gate-model framework. By integrating control logic directly onto the quantum processor, D-Wave aims to mitigate the “wiring bottleneck”—the requirement for high-density, individual control lines routed from room temperature into the dilution refrigerator—which currently limits the scalability of superconducting quantum computers. The demonstration utilized a specialized multichip package integrating a high-coherence fluxonium qubit chip with a multilayer control chip via superconducting bump bonding. Unlike the hardware-heavy control schemes used by many superconducting competitors, D-Wave’s architecture leverages multiplexed digital-to-analog converters to manage thousands of qubits with a limited number of bias wires. This approach—developed in collaboration with the NASA Jet Propulsion Laboratory (JPL)—allows for high-density interconnects that maintain superconductivity and qubit fidelity while significantly reducing the thermal load and physical footprint within the dilution refrigerator. Strategically, this milestone positions D-Wave as the only commercial entity currently developing both annealing and gate-model superconducting hardware on a shared technological stack. By utilizing its established micro-circuit manufacturing and advanced cryogenic packaging supply chains, the company seeks to accelerate the timeline for a commercially viable gate-model system. D-Wave asserts that its superconducting platform offers faster gate execution times than trapped-ion or neutral-atom modalities, a distinction the company believes will be decisive as the industry moves toward fault-tolerant, large-scale quantum processing units (QPUs). Read the official press release here. January 6, 2026 Mohamed Abdel-Kareem2026-01-06T13:32:39-08:00 Leave A Comment Cancel replyComment Type in the text displayed above Δ This site uses Akismet to reduce spam. Learn how your comment data is processed.

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Source: Quantum Computing Report